CS181012-CQZ Cirrus Logic Inc, CS181012-CQZ Datasheet - Page 24

IC COBRANET CS181012 144LQFP

CS181012-CQZ

Manufacturer Part Number
CS181012-CQZ
Description
IC COBRANET CS181012 144LQFP
Manufacturer
Cirrus Logic Inc
Series
CobraNet®r
Type
Audio Processorr
Datasheets

Specifications of CS181012-CQZ

Package / Case
144-LQFP
Applications
Data Transport
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Number Of Converters
8
Core Size
32 Bit
Digital Ic Case Style
LQFP
No. Of Pins
144
Supply Voltage Range
1.71V To 1.89V
Operating Temperature Range
0°C To +70°C
Filter Terminals
SMD
Supply Voltage Min
3.13V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1021 - MODULE COBRANET 4961 CM2 FB598-1020 - MODULE COBRANET 1810 CM2 MT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1025

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS181012-CQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
CS181012-CQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
CobraNet Hardware User’s Manual
Host Management Interface (HMI)
7.2 Host Port Timing - Motorola
(C
NOTES:1. The system designer should be aware that the actual maximum speed of the communication port may
24
Address setup before HEN and HDS low
Address hold time after HEN and HDS low
Delay between HDS then HEN low or HEN then HDS low
Data valid after HEN and HDS low with HRW high
HEN and HDS low for read
Data hold time after HEN or HDS high after read
Data high-Z after HEN or HDS high after read
HEN or HDS high to HEN and HDS low for next read
HEN or HDS high to HEN and HDS low for next write
HR/W rising to HREQ falling
Delay between HDS then HEN low or HEN then HDS low
Data setup before HEN or HDS high
HEN and HDS low for write
HRW setup before HEN and HDS low
HRW hold time after HEN or HDS high
Data hold after HEN or HDS high
HEN or HDS high to HEN and HDS low with HRW high for
next read
HEN or HDS high to HEN and HDS low for next write
HRW rising to HREQ falling
L
= 20 pF)
be limited by the firmware application. Hardware handshaking on the HREQ pin/bit should be observed
to prevent overflowing the input data buffer.
HREQ may be wired to a host interrupt or DMA request input. HREQ is used to signal the
host that data is available (read case, logic 0) or space is available in the host port data
channel (write case, logic 1).
The read and write case are distinguished by the HMI based on the preceding message.
Identify, Goto Translation (read), Goto Packet (read) and Goto Counters cause HREQ to
represent read status. Goto Translation (write) and Goto Packet (write) switch HREQ to
write mode. All other commands have no effect on HREQ operation.
In general, the host can read from the CS1810xx/CS4961xx when HREQ is low and can
write data to CS1810xx/CS4961xx when HREQ is high.
Parameter
Read
Write
®
©
Mode
Copyright 2005 Cirrus Logic, Inc.
Symbol
t
t
t
mrwbsyl
mrwirqh
t
t
t
t
t
t
mrwhld
t
t
t
t
mrwsu
t
mwpw
t
t
t
t
mrdtw
mcdw
mdhw
mwtrd
mrpw
t
mdsu
mdhr
mcdr
mdis
mwd
mas
mah
mdd
mrd
Min
24
30
30
24
24
30
30
5
5
0
8
0
8
8
8
-
-
-
-
Max
19
18
12
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DS651UM23
Version 2.3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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