AD5425 Analog Devices, AD5425 Datasheet

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AD5425

Manufacturer Part Number
AD5425
Description
High Bandwidth, CMOS 8-Bit Serial Interface Multiplying D/A Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD5425

Resolution (bits)
8bit
Dac Update Rate
2.47MSPS
Dac Settling Time
100ns
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Ser,SPI

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FEATURES
2.5 V to 5.5 V supply operation
50 MHz serial interface
9.5 MSPS update rate
INL of ±0.25 LSB
10 MHz multiplying bandwidth
±10 V reference input
Low glitch energy: <2 nV-s
Extended temperature range: −40°C to +125°C
10-lead MSOP package
Guaranteed monotonic
4-quadrant multiplication
Power-on reset with brownout detection
LDAC function
0.4 μA typical power consumption
APPLICATIONS
Portable battery-powered applications
Waveform generators
Analog processing
Instrumentation applications
Programmable amplifiers and attenuators
Digitally controlled calibration
Programmable filters and oscillators
Composite video
Ultrasound
Gain, offset, and voltage trimming
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
LDAC
SYNC
SCLK
SDIN
POWER-ON
AD5425
FUNCTIONAL BLOCK DIAGRAM
RESET
V
DD
INPUT SHIFT REGISTER
CONTROL LOGIC AND
DAC REGISTER
Multiplying DAC with Serial Interface
INPUT LATCH
R-2R DAC
Figure 1.
V
8-BIT
GND
REF
GENERAL DESCRIPTION
The AD5425
analog converter that operates from a 2.5 V to 5.5 V power
supply, making it suitable for battery-powered applications and
many other applications.
This DAC utilizes a double buffered, 3-wire serial interface that
is compatible with SPI
interface standards. An LDAC pin is also provided, which
allows simultaneous updates in a multi-DAC configuration. On
power-up, the internal shift register and latches are filled with
0s and the DAC outputs are 0 V.
As a result of manufacturing on a CMOS submicron process,
this DAC offers excellent 4-quadrant multiplication charac-
teristics with large signal multiplying bandwidths of 10 MHz.
The applied external reference input voltage (V
the full-scale output current. An integrated feedback resistor,
R
when combined with an external I-to-V precision amplifier.
The AD5425 is available in a small, 10-lead MSOP package.
1
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
U.S. Patent No. 5,969,657
FB
, provides temperature tracking and full-scale voltage output
R
1
is a CMOS, 8-bit, current output digital-to-
R
I
I
OUT
OUT
FB
1
2
8-Bit, High Bandwidth
© 2005 Analog Devices, Inc. All rights reserved.
®
, QSPI
, MICROWIRE
www.analog.com
REF
AD5425
, and most DSP
) determines

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AD5425 Summary of contents

Page 1

... MHz. The applied external reference input voltage (V the full-scale output current. An integrated feedback resistor provides temperature tracking and full-scale voltage output FB when combined with an external I-to-V precision amplifier. The AD5425 is available in a small, 10-lead MSOP package. 1 U.S. Patent No. 5,969,657 FUNCTIONAL BLOCK DIAGRAM ...

Page 2

... AD5425 TABLE OF CONTENTS Specifications..................................................................................... 3 Timing Characteristics..................................................................... 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Terminology .................................................................................... 13 Theory of Operation ...................................................................... 14 Circuit Operation ....................................................................... 14 Single-Supply Applications ....................................................... 16 Positive Output Voltage ............................................................. 16 REVISION HISTORY 3/05—Rev Rev. A Updated Format................................................................ Universal Changes to Specifications Section.................................................3 Added Figure 18, Figure 20, Figure 21........................................10 Change to Table 7 ..........................................................................18 2/04— ...

Page 3

... Rev Page AD5425 unless MIN MAX Conditions/Comments Guaranteed monotonic Data = 0x0000 25° OUT Data = 0x0000 −40°C to +125°C, I OUT Input resistance TC = −50 ppm/°C Input resistance TC = −50 ppm/° 4 200 μ ...

Page 4

... AD5425 Parameter Digital THD 50 kHz f OUT 20 kHz f OUT Output Noise Spectral Density SFDR Performance (Wide Band) 50 kHz f OUT 20 kHz f OUT SFDR Performance (Narrow Band) 50 kHz f OUT 20 kHz f OUT Intermodulation Distortion POWER REQUIREMENTS Power Supply Range I DD Power Supply Sensitivity 1 Guaranteed by design and characterization, not subject to production test. ...

Page 5

... SCLK falling edge to LDAC falling edge LDAC pulse width ns min SCLK falling edge to LDAC rising edge ns min DB0 t 9 Figure 2. Timing Diagram Rev Page )/ unless otherwise noted. MIN MAX AD5425 ...

Page 6

... AD5425 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter Rating V to GND −0 GND − +12 V REF GND −0 OUT OUT 1 Logic Input and Output −0 Operating Temperature Range Extended Industrial (Y Version) − ...

Page 7

... DAC Feedback Resistor Pin. Establishes voltage output for the DAC by connecting to external amplifier output OUT OUT AD5425 REF GND TOP VIEW SCLK LDAC 4 7 (Not to Scale) SDIN SYNC 5 6 Figure 3. Pin Configuration Rev Page AD5425 ...

Page 8

... AD5425 TYPICAL PERFORMANCE CHARACTERISTICS 0. 25° 10V REF 0. 0.10 0.05 0 –0.05 –0.10 –0.15 –0. 100 150 CODE Figure 4. INL vs. Code (8-Bit DAC) 0. 25° 10V REF 0. 0.10 0.05 0 –0.05 –0.10 –0.15 –0. 100 150 CODE Figure 5. DNL vs. Code (8-Bit DAC) ...

Page 9

... GAIN ERROR OFFSET ERROR 1.0 1.5 2.0 V (V) BIAS = 25° 2.5V OFFSET ERROR GAIN ERROR 0.5 1.0 1.5 2.0 V (V) BIAS Voltage Applied to I BIAS = 25° 2.5V MIN INL BIAS MAX INL BIAS MAX DNL BIAS MIN DNL BIAS 0.5 1.0 1.5 V (V) BIAS Voltage Applied to I BIAS OUT AD5425 2.5 2 OUT 2.5 2 OUT 2.0 2 ...

Page 10

... AD5425 0 25°C A 0.6 0 0.4 0.3 0 2. INPUT VOLTAGE (V) Figure 16. Supply Current vs. Input Voltage 1 25°C A 1.6 1 1.2 1 0.8 0.6 0.4 0.2 0 2.5 3.0 3.5 4.0 VOLTAGE (V) Figure 17. Threshold Voltages vs. Supply Voltage 0.2 0 –0.2 –0 25°C A –0 ±3.5V REF C = 1.8pF COMP AD8083 AMPLIFIER – ...

Page 11

... 3.5V REF AD8038 AMPLIFIER 12k 14k 16k 18k 20k 22k 24k 26k 28k FREQUENCY (Hz kHz OUT T = 25° 3.5V REF AD8038 AMPLIFIER 30k 35k 40k 45k 50k 55k 60k 65k 70k FREQUENCY (Hz kHz OUT AD5425 1M 30k 75k ...

Page 12

... AD5425 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 10k 15k 20k 25k FREQUENCY (Hz) Figure 28. Narrowband IMD (±50%) Clock = 2 MHz kHz kHz OUT OUT 3.5V REF AD8038 AMPLIFIER 30k 35k Rev Page ...

Page 13

... Digital SFDR is a measure of the usable dynamic range of the DAC when the signal is a digitally generated sine wave. Rev Page pins and subsequently into the following OUT 1 terminal, when all 0s are OUT ( ) + + + log V 1 AD5425 ...

Page 14

... AD5425 THEORY OF OPERATION The AD5425 is an 8-bit current output DAC consisting of a standard inverting R-2R ladder configuration. A simplified diagram is shown in Figure 29. The feedback resistor, R value of R. The value typically 10 kΩ (minimum 8 kΩ and maximum 12 kΩ). and I OUT ...

Page 15

... C1 should be found empirically, but generally adequate for compensation. Rev Page 20kΩ R4 10kΩ –V OUT REF TO +V REF of the DAC and the OUT for stability, as shown in Figure 30 and Figure FB AD5425 ...

Page 16

... AD5425 SINGLE-SUPPLY APPLICATIONS Current Mode Operation In the current mode circuit of Figure 32 biased positive by an amount applied to V configuration, the output voltage is given × × (V − V OUT FB DAC BIAS As D varies from 0 to 255, the output voltage varies from ...

Page 17

... kΩ. With a gain (that is, 1/ the error voltage is 1.6 mV. REFERENCE SELECTION When selecting a reference for use with the AD5425 current output DAC, pay attention to the reference’s output voltage temperature coefficient specification. This parameter not only affects the full-scale error, but can also affect the linearity (INL and DNL) performance ...

Page 18

... AD5425 AMPLIFIER SELECTION The primary requirement for the current-steering mode is an amplifier with low input bias currents and low input offset vol- tage. The input offset voltage amp is multiplied by the variable gain (due to the code dependent output resistance of the DAC) of the circuit. A change in this noise gain between two adjacent digital fractions produces a step change in the output voltage due to the amplifier’ ...

Page 19

... SERIAL INTERFACE The AD5425 has a simple 3-wire interface that is compatible with SPI, QSPI, MICROWIRE, and DSP interface standards. Data is written to the device in 8-bit words. This 8-bit word consists of 8 data bits, as shown in Figure 37. DB7 (MSB) DB7 DB6 DB5 DB4 DB3 DB2 DATA BITS Figure 37 ...

Page 20

... SCK of the MC68HC11 drives the SCLK of the DAC interface, the MOSI output drives the serial data line the AD5425. The SYNC signal is derived from a port line, PC7. When data is being transmitted to the AD5425, the SYNC line is taken low (PC7). Data appearing on the MOSI output is valid on the falling edge of SCK ...

Page 21

... DAC serial port. This microcontroller 1 AD5425 transfers eight bits of data during each serial transfer operation. Figure 45 shows the connection diagram. SYNC SCLK PIC16C6x/7x SDIN 1 ADDITIONAL PINS OMITTED FOR CLARITY. Rev Page AD5425 SCK/RC3 SCLK SDI/RC4 SDIN RA1 SYNC Figure 45. PIC16C6x/7x-to-AD5425 Interface AD5425 1 ...

Page 22

... The printed circuit board on which the AD5425 is mounted should be designed so that the analog and digital sections are separated and confined to certain areas of the board. If the DAC system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only ...

Page 23

... DD P1–30 P2–3 + C11 C12 0.1μF 10μF P2–2 AGND + C13 C14 0.1μF 10μF P2–1 V DD1 V SS P2–4 + C15 C16 0.1μF 10μF Figure 46. Schematic of the AD5425 Evaluation Board V DD1 R1 = 0Ω 0.1μF 10μ 4.7pF OUT ...

Page 24

... AD5425 P1 EVAL–AD5425EB Figure 47. Component-Side Artwork SCLK J3 C11 U3 SCLK J1 VOUT SDIN U1 J4 SDIN R1 C6 SYNC LK1 SYNC VREF U2 C3 SDO/LDAC J5 J2 VREF SDO/LDAC C16 C9 C14 J6 C15 C10 C13 P2 Figure 48. Silkscreen—Component-Side View (Top Layer) Rev Page ...

Page 25

... Figure 49. Solder-Side Artwork Rev Page AD5425 ...

Page 26

... AD5425 Table 11. Overview of the AD54xx and AD55xx Devices Part No. Resolution No. DACs AD5424 8 1 AD5426 8 1 AD5428 8 2 AD5429 8 2 AD5450 8 1 AD5432 10 1 AD5433 10 1 AD5439 10 2 AD5440 10 2 AD5451 10 1 AD5443 12 1 AD5444 12 1 AD5415 12 2 AD5405 12 2 AD5445 12 2 AD5447 ...

Page 27

... Dimensions shown in millimeters INL (LSBs) Temperature Range ±0.25 −40°C to +125°C ±0.25 −40°C to +125°C ±0.25 −40°C to +125°C Rev Page 0.80 8° 0.60 0° 0.40 Package Description Branding MSOP D1P MSOP D1P MSOP D1P Evaluation Kit AD5425 Package Option RM-10 RM-10 RM-10 ...

Page 28

... AD5425 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03161-0-3/05(A) Rev Page ...

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