AD9772A Analog Devices, AD9772A Datasheet - Page 23

• Manufacturer Part Number: AD9772A
• Manufacturer: Analog Devices

Specifications of AD9772A

• Resolution (bits): 14bit
• Dac Update Rate: 160MSPS
• Dac Settling Time: 11ns
• Max Pos Supply (v): +3.6V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

ADDITIONAL
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external 1.2 V reference, such as the
AD1580, can be applied to REFIO as shown in Figure 39. The
external reference can provide either a fixed reference voltage to
enhance accuracy and drift performance or a varying reference
voltage to improve gain control. Note that the 0.1 μF compensation
capacitor is not required because the internal reference is disabled
and the high input impedance of REFIO minimizes any loading
of the external reference.
AD1580
REFERENCE CONTROL AMPLIFIER
The AD9772A also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, I
control amplifier is configured as a V-I converter, as shown in
Figure 39, such that its current output, I
ratio of the V
Equation 4. I
the proper scaling factor to set I
The control amplifier allows a wide (10:1) adjustment span of
I
62.5 μA and 625 μA. The wide adjustment span of I
vides several application benefits. The first benefit relates
directly to the power dissipation of the AD9772A DAC, which
is proportional to I
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
I
Figure 40 for a fixed R
ence is disabled, and the voltage of REFIO is varied over its
compliance range of 1.25 V to 0.10 V. REFIO can be driven by a
single-supply DAC or digital potentiometer, thus allowing I
to be digitally controlled for a fixed R
shows the AD5220, an 8-bit serial input digital potentiometer,
OUTFS
REF
can be controlled using the single-supply circuit shown in
LOAD
over a 2 mA to 20 mA range by setting I
10kΩ
REF BUFFER
EXTERNAL
OPTIONAL
R
SET
REF
REFIO
Figure 39. External Reference Configuration
Figure 38. Internal Reference Configuration
V
is copied to the segmented current sources with
REFIO
I
V
REF
REFIO
and an external resistor, R
OUTFS
=
2kΩ
0.1µF
/R
SET
SET
(see the Power Dissipation section).
. In this example, the internal refer-
REFIO
FSADJ
REFIO
FSADJ
REFLO
AD9772A
REFLO
AD9772A
+1.2V REF
1.2V REF
OUTFS
as stated in Equation 3.
SET
. This particular example
REF
REFERENCE
, is determined by the
AMPLIFIER
CONTROL
SET
250p F
250pF
REF
, as stated in
between
2.7V TO 3.6V
AVDD
AVDD
2.7V TO 3.6V
OUTFS
CURRENT
CURRENT
SOURCE
SOURCE
ARRAY
ARRAY
OUTFS
pro-
. The
REF
Rev. C | Page 23 of 40
along with the AD1580 voltage reference. Note that because the
input impedance of REFIO does interact with and load the
digital potentiometer wiper to create a slight nonlinearity in the
programmable voltage divider ratio, a digital potentiometer
with 10 kΩ or less resistance is recommended.
ANALOG OUTPUTS
The AD9772A produces two complementary current outputs,
I
differential operation. I
complementary single-ended voltage outputs, V
via a load resistor, R
Function
differential voltage, V
also be converted to a single-ended voltage via a transformer or
differential amplifier configuration.
Figure 41 shows the equivalent analog output circuit of the
AD9772A, which consists of a parallel combination of PMOS
differential current switches associated with each segmented
current source. The output impedance of I
determined by the equivalent parallel combination of the PMOS
switches and is typically 200 kΩ in parallel with 3 pF. Due to the
nature of a PMOS device, the output impedance is also slightly
dependent on the output voltage (that is, V
to a lesser extent, the analog supply voltage, AVDD, and full-
scale current, I
output impedance can be a source of dc nonlinearity and ac
linearity (that is, distortion), its effects can be limited if certain
precautions are taken.
I
compliance range. The negative output compliance threshold
of −1.0 V is set by the breakdown limits of the CMOS process.
Operation beyond this maximum limit may result in a breakdown
AD1580
OUTA
OUTA
1.2V
and I
and I
AD9772A
10kΩ
section, by using Equation 5 through Equation 8. The
OUTB
OUTB
Figure 40. Single-Supply Gain Control Circuit
Figure 41. Equivalent Analog Output Circuit
AD5220
, which can be configured for single-ended or
OUTFS
also have a negative and positive voltage
10kΩ
R
. Although the signal dependency of the
LOAD
SET
DIFF
OUTA
, as described in the
, existing between V
REFIO
FSADJ
AD9772A
REFLO
and I
1.2V REF
OUTB
B
can be converted into
R
I
OUTA
LOAD
OUTA
OUTA
DAC Transfer
OUTA
250pF
and I
and V
OUTA
I
R
OUTB
AVDD
and V
LOAD
AD9772A
2.7V TO 3.6V
AVDD
CURRENT
SOURCE
OUTB
and V
ARRAY
OUTB
OUTB
B
is
) and,
OUTB
, can
,