AD795 Analog Devices, AD795 Datasheet - Page 13

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AD795

Manufacturer Part Number
AD795
Description
Low Power, Low Noise Precision FET Op Amp
Manufacturer
Analog Devices
Datasheet

Specifications of AD795

-3db Bandwidth
1.6MHz
Slew Rate
1V/µs
Vos
100µV
Ib
1pA
# Opamps Per Pkg
1
Input Noise (nv/rthz)
9nV/rtHz
Vcc-vee
8V to 36V
Isy Per Amplifier
1.5mA
Packages
SOIC

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Leakage through the bulk of the circuit board can still occur
with the guarding schemes shown in Figure 34 and Figure 35.
Standard G10 type PCB material may not have high enough
volume resistivity to hold leakages at the sub-picoampere level
particularly under high humidity conditions. One option that
eliminates all effects of board resistance is shown in Figure 36.
The AD795’s sensitive input pin (either Pin 2 when connected
as an inverter, or Pin 3 when connected as a follower) is bent up
and soldered directly to a Teflon® insulated standoff. Both the
signal input and feedback component leads must also be
insulated from the circuit board by Teflon standoffs or low
leakage shielded cable.
Contaminants such as solder flux on the board’s surface and on
the amplifier’s package can greatly reduce the insulation resistance
between the input pin and those traces with supply or signal
voltages. Both the package and the board must be kept clean
and dry. An effective cleaning procedure is to first swab the
surface with high grade isopropyl alcohol, then rinse it with
deionized water and, finally, bake it at 100°C for 1 hour. Poly-
propylene and polystyrene capacitors should not be subjected to
the 100°C bake because they can be damaged at temperatures
greater than 80°C.
Other guidelines include making the circuit layout as compact
as possible and reducing the length of input lines. Keeping
circuit board components rigid and minimizing vibration
reduce triboelectric and piezoelectric effects. All precision high
impedance circuitry requires shielding from electrical noise and
interference. For example, a ground plane should be used under
all high value (that is, greater than 1 MΩ) feedback resistors. In
some cases, a shield placed over the resistors, or even the entire
amplifier, may be needed to minimize electrical interference
originating from other circuits. Referring to the equation in
1
2
3
4
AD795
Figure 36. Input Pin to Insulating Standoff
8
8
7
7
6
6
5
5
BOARD
INPUT SIGNAL
PC
LED
TEFLON INSULATED STANDOFF
INPUT PIN:
PIN 2 FOR INVERTER
OR PIN 3 FOR FOLLOWER.
AD795
Rev. C | Page 13 of 20
Figure 33, this coupling can take place in either, or both, of two
different forms via time varying fields:
or by injection of parasitic currents by changes in capacitance
due to mechanical vibration:
Both proper shielding and rigid mechanical mounting of
components help minimize error currents from both of these
sources.
OFFSET NULLING
The circuit in Figure 37 can be used when the amplifier is used
as an inverter. This method introduces a small voltage in series
with the amplifier’s positive input terminal. The amplifier’s input
offset voltage drift with temperature is not affected. However,
variation of the power supply voltages causes offset shifts.
dV
dCp
dT
dT
C
V
P
Figure 37. Alternate Offset Null Circuit for Inverter
V
R
I
I
200Ω
499kΩ
2
3
AD795
R
F
499kΩ
0.1µF
6
+V
–V
S
S
100kΩ
V
OUT
+
AD795

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