ADM697 Analog Devices, ADM697 Datasheet - Page 9

• Manufacturer Part Number: ADM697
• Manufacturer: Analog Devices

Specifications of ADM697

• Product Description: µP Supv with CE Inputs, Adj Low Line V Monitor, Adj W-dog Timer, Low Line, Pwr Fail & W-dog Status
• Reset Threshold (v): 1.3,Adjustable
• Min Reset Timeout (ms): 35
• Reset Output-stage: Active-High/Push-Pull,Active-Low/Push-Pull
• Backup-battery Switch: No
• Chip Enable Gating: Yes
• Typ Watchdog Timeout (ms): 100,1600,adj.
• Package: DIP,SOIC
• Us Price 1000-4999: n/a
• Display In Ist: Yes
• Batt Source Sel Flg: Y
• Reset Threshold Summary: 1.3V (Adjustable)
• Min Positive Supply (v): +3V
• Batt-backup-flg: Yes

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APPLICATIONS INFORMATION
Increasing the Drive Current (ADM696)
If the continuous output current requirements at V
100 mA or if a lower V
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output (ADM696)
can directly drive the base of the external transistor.
Using a Rechargeable Battery for Backup (ADM696)
If a capacitor or a rechargeable battery is used for backup, then
the charging resistor should be connected to V
eliminates the discharge path that would exist during power-
down if the resistor is connected to V
Adding Hysteresis to the Power Fail Comparator
For increased noise immunity, hysteresis may be added to the
power fail comparator. Since the comparator circuit is nonin-
verting, hysteresis can be added simply by connecting a resistor
between the PFO output and the PFI input as shown in Fig-
ure 16. When PFO is low, resistor R3 sinks current from the
summing junction at the PFI pin. When PFO is high, the series
combination of R3 and R4 source current into the PFI summing
junction. This results in differing trip levels for the comparator.
Alternate Watchdog Input Drive Circuits
The watchdog feature can be enabled and disabled under pro-
gram control by driving WDI with a 3-state buffer (Figure 17a).
When three-stated, the WDI input will float thereby disabling
the watchdog timer.
POWER
POWER
INPUT
INPUT
+5V
+5V
RECHARGABLE
BATTERY
BATTERY
0.1µF
Figure 14. Increasing the Drive Current
Figure 15. Rechargeable Battery
0.1µF
CC
–V
V
V
BATT
BATT
OUT
V
V
CC
CC
PNP TRANSISTOR
voltage differential is desired,
ADM696
I =
ADM696
BATT
V
R
ON
OUT
CC
R
– V
.
BATT
V
V
OUT
OUT
OUT
0.1µF
0.1µF
since this
OUT
exceeds
–9–
This circuit is not entirely foolproof, and it is possible that a
software fault could erroneously 3-state the buffer. This would
then prevent the ADM69x from detecting that the microproces-
sor is no longer operating correctly. In most cases a better
method is to extend the watchdog period rather than disabling
the watchdog. This may be done under program control using
the circuit shown in Figure 17b. When the control input is high,
the OSC SEL pin is low and the watchdog timeout is set by the
external capacitor. A 0.01 F capacitor sets a watchdog timeout
delay of 100 s. When the control input is low, the OSC SEL pin
is driven high, selecting the internal oscillator. The 100 ms or
the 1.6 s period is chosen, depending on which diode in Fig-
ure 17b is used. With D1 inserted, the internal timeout is set at
100 ms while with D2 inserted the timeout is set at 1.6 s.
Figure 16. Adding Hysteresis to the Power Fail Comparator
+7V TO +15V
WATCHDOG
STROBE
Figure 17a. Programming the Watchdog Input
Figure 17b. Programming the Watchdog Input
CONTROL
INPUT*
POWER
CONTROL
INPUT
INPUT
R1
R2
V
V
ASSUMING R
HYSTERESIS V
D1
H
L
= 1.3V
= 1.3V
7805
(
(
1+ ––– – –––––––––––––
1+ ––– + –––
4
D2
R
R
R
R
< <
H
+5V
1
2
1
2
PFI
– V
R
*LOW = INTERNAL TIMEOUT
HIGH = EXTERNAL TIMEOUT
ADM69x
3
R
R
L
R
1.3V (R
THEN
ADM696/ADM697
1
3
= 5V
1
1.3V
(5V – 1.3V)
)
OSC IN
OSC SEL
WDI
(
3 +
–––
V
R
R
R3
CC
1
2
R
)
4
)
)
ADM69x
ADM69x
PFO
µP NMI
R4
TO