ADUC816 Analog Devices, ADUC816 Datasheet - Page 25

• Manufacturer Part Number: ADUC816
• Description: Precision Analog Microcontroller: 1MIPS 8052 MCU + 8kB Flash + Dual 16-Bit ADC + 12-Bit DAC
• Manufacturer: Analog Devices

Specifications of ADUC816

• Mcu Core: 8052
• Mcu Speed (mips): 1.3
• Sram (bytes): 256Bytes
• Gpio Pins: 34
• Adc # Channels: 4

REV. A
SFR INTERFACE TO THE PRIMARY AND AUXILIARY
ADCS
Both ADCs are controlled and configured via a number of SFRs
that are mentioned here and described in more detail in the
following pages.
ADCSTAT:
ADCMODE:
ADC0CON:
ADC1CON:
SF:
ADCSTAT (ADC Status Register)
This SFR reflects the status of both ADCs including data ready, calibration and various (ADC-related) error and warning condi-
tions including reference detect and conversion overflow/underflow flags.
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
R
D
Y
0
Name
RDY0
RDY1
CAL
NOXREF
ERR0
ERR1
---
---
ADC Status Register. Holds general status of
the Primary and Auxiliary ADCs.
ADC Mode Register. Controls general modes
of operation for Primary and Auxiliary ADCs.
Primary ADC Control Register. Controls
specific configuration of Primary ADC.
Auxiliary ADC Control Register. Controls
specific configuration of Auxiliary ADC.
Sinc Filter Register. Configures the decimation
factor for the Sinc3 filter and thus the Primary
and Auxiliary ADC update rates.
R
D
Y
1
Ready Bit for Auxiliary ADC.
D8H
00H
Yes
Description
Ready Bit for Primary ADC.
ADC conversion or calibration. The Primary ADC is inhibited from writing further results to its
data or calibration registers until the RDY0 bit is cleared.
Same definition as RDY0 referred to the Auxiliary ADC.
Calibration Status Bit.
No External Reference Bit
specified threshold. When Set conversion results are clamped to all ones,if using ext. reference.
Primary ADC Error Bit.
been clamped to all zeros or all ones. After a calibration this bit also flags error conditions that
caused the calibration registers not to be written.
Auxiliary ADC Error Bit.
Same definition as ERR0 referred to the Auxiliary ADC.
Reserved for Future Use.
Reserved for Future Use.
C
by hardware on completion of ADC conversion or calibration cycle.
to indicate that one or both of the REFIN pins is floating or the applied voltage is below a
by hardware on completion of calibration.
by hardware to indicate that the result written to the Primary ADC data registers has
A
L
Table III. ADCSTAT SFR Bit Designations
indirectly by a write to the mode bits to start another ADC conversion or calibration.
by a write to the mode bits to initiate a conversion or calibration.
to indicate valid V
directly by the user or indirectly by write to the mode bits to start another Primary
N
O
X
R
E
F
REF
.
ICON:
ADC0H/M :
ADC1H/L:
OF0H/M :
OF1H/L:
GN0H/M :
GN1H/L:
To maintain code compatibility with the ADuC824, it is the low-byte SFR
associated with these register groups that is omitted on the ADuC816.
E
R
R
0
Current Source Control Register. Allows
user control of the various on-chip current
source options.
Primary ADC 16-bit conversion result held in
these two 8-bit registers.
in these two 8-bit registers.
Primary ADC 16-bit Offset Calibration Coeffi-
cient held in these two 8-bit registers.
Auxiliary ADC 16-bit Offset Calibration Coeffi-
cient held in these two 8-bit registers.
Primary ADC 16-bit Gain Calibration Coeffi-
cient held in these two 8-bit registers.
Auxiliary ADC 16-bit Gain Calibration Coeffi-
cient held in these two 8-bit registers.
Auxiliary ADC 16-bit conversion result held
E
R
R
1
-
- -
-
- -