ADP1755 Analog Devices, ADP1755 Datasheet - Page 12

• Manufacturer Part Number: ADP1755
• Description: 1.2A Low-Vin, Adjustable-Vout LDO Linear Regulator
• Manufacturer: Analog Devices

ADP1754/ADP1755
ADJUSTABLE OUTPUT VOLTAGE (ADP1755)
The output voltage of the ADP1755 can be set over a 0.75 V to
3.0 V range. The output voltage is set by connecting a resistive
voltage divider from VOUT to ADJ. The output voltage is calcu-
lated using the following equation:
where:
R1 is the resistor from VOUT to ADJ.
R2 is the resistor from ADJ to GND.
The maximum bias current into ADJ is 150 nA. Therefore, to
achieve less than 0.5% error due to the bias current, use values
less than 60 kΩ for R2.
ENABLE FEATURE
The ADP1754/ADP1755 use the EN pin to enable and disable
the VOUT pins under normal operating conditions. As shown
in Figure 28, when a rising voltage on EN crosses the active
threshold, VOUT turns on. When a falling voltage on EN crosses
the inactive threshold, VOUT turns off.
V
OUT
1
2
1
2
CH1
CH1
= 0.5 V × (1 + R1/R2)
Figure 27. V
2.0V
500mV
T
B
Figure 28. Typical EN Pin Operation
W
B
W
CH2 500mV
CH2 500mV
OUT
T
Ramp-Up with Internal Soft Start
500mV/DIV
500mV/DIV
V
V
EN
EN
OUT
OUT
B
B
W
W
M40µs
M2.0ms
T
T
9.8%
29.6%
V
C
V
C
OUT
IN
OUT
IN
A CH1
= C
= C
A CH1
= 1.5V
= 1.5V
OUT
OUT
= 4.7µF
= 4.7µF
920mV
1.05V
Rev. B | Page 12 of 20
(2)
As shown in Figure 28, the EN pin has hysteresis built in. This
hysteresis prevents on/off oscillations that can occur due to
noise on the EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 29 shows typical EN active/inactive thresholds
when the input voltage varies from 1.6 V to 3.6 V.
POWER-GOOD FEATURE
The ADP1754/ADP1755 provide a power-good pin, PG, to
indicate the status of the output. This open-drain output
requires an external pull-up resistor to V
shutdown mode, current-limit mode, thermal shutdown, or
if it falls below 90% of the nominal output voltage, PG imme-
diately transitions low. During soft start, the rising threshold of
the power-good signal is 93.5% of the nominal output voltage.
The open-drain output is held low when the ADP1754/ADP1755
have sufficient input voltage to turn on the internal PG transistor.
An optional soft start delay can be detected. The PG transistor
is terminated via a pull-up resistor to V
Power-good accuracy is 93.5% of the nominal regulator output
voltage when this voltage is rising, with a 90% trip point when
this voltage is falling.
Regulator input voltage brownouts or glitches trigger a power
no-good if V
A normal power-down triggers a power no-good when V
drops below 90%.
1.1
1.0
0.9
0.8
0.7
0.6
0.5
1.6
Figure 29. Typical EN Pin Thresholds vs. Input Voltage
OUT
1.8
falls below 90%.
2.0
2.2
EN ACTIVE
INPUT VOLTAGE (V)
2.4
2.6
EN INACTIVE
2.8
OUT
IN.
3.0
or V
If the part is in
3.2
IN
.
3.4
3.6
OUT