STM8L162R8 STMicroelectronics, STM8L162R8 Datasheet
STM8L162R8
Specifications of STM8L162R8
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STM8L162R8 Summary of contents
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... I/Os, all mappable on interrupt vectors ■ capacitive sensing channels with free firmware ■ Development support – Fast on-chip programming and non- intrusive debugging with SWIM – Bootloader using USART ■ 96-bit unique ID Doc ID 17959 Rev 2 STM8L162R8 STM8L162M8 Preliminary data LQFP64 1/121 www.st.com 1 ...
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... Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.14.1 3.14.2 3.14.3 3.15 Watchdog timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.15.1 2/121 Advanced STM8 Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Interrupt controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16-bit advanced control timer (TIM1 16-bit general purpose timers (TIM2, TIM3, TIM5 8-bit basic timer (TIM4 Window watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 3.15.2 3.16 Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.17 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.17.1 3.17.2 3.17.3 3.18 Infrared (IR) interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.19 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 Memory and register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.1 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.2 Register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 Interrupt vector mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 7 Option bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 8 Unique Electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 9.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 9.1.1 9.1.2 9.1.3 9.1.4 9.1.5 9.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 9.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 9.3.1 9.3.2 9.3.3 9.3.4 9.3.5 9.3.6 9.3.7 Independent watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SPI ...
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... Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 11 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 4/121 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 LCD controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 12-bit DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 12-bit ADC1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 List of tables Table 1. High density STM8L162x low power device features and peripheral counts . . . . . . . . . . . 10 Table 2. Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 3. Legend/abbreviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 4. STM8L162x pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 5. Flash and RAM boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 6. Factory conversion registers Table 7. I/O port hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 8. ...
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... Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Table 60. Thermal characteristics 115 Table 61. 80-pin low profile quad flat package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Table 62. LQFP64 – mm, 64-pin low-profile quad flat package mechanical data . . . . . . . . 118 Table 63. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 6/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 List of figures Figure 1. High density STM8L162xx device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 2. Clock tree diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 3. STM8L162M8 80-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 4. STM8L162R8 64-pin pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 5. Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 6. Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 7. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 8. Power supply thresholds Figure 9. Typical I from RAM vs ...
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... Introduction This document describes the features, pinout, mechanical data and ordering information for the high density STM8L162R8 and STM8L162M8 devices.For further details on the STMicroelectronics Ultralow power family please refer to continuum on page For detailed information on device operation and registers, refer to the reference manual (RM0031) ...
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... STM8L162R8, STM8L162M8 2.1 STM8L Ultralow power 8-bit family benefits High density STM8L162xx devices are part of the STM8L Ultralow power family providing the following benefits: ● Integrated system – 64 Kbytes of high-density embedded Flash program memory – 2 Kbytes of data EEPROM – 4 Kbytes of RAM – ...
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... RTC, window watchdog, independent watchdog, 16-MHz and 38-kHz internal RC 16-MHz and 32-kHz external oscillator 16 MHz 1.8 to 3.6 V (down to 1. power-down) with BOR 1.65 to 3.6 V without BOR +85 °C / LQFP64 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 STM8L162M8 8x40 or 4x44 1 (8-bit) 3 ...
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... STM8L162R8, STM8L162M8 2.3 Ultralow power continuum The Ultralow power STM8L151xx, STM8L152xx and STM8L162xx are fully pin-to-pin, software and feature compatible. Besides the full compatibility within the family, the devices are part of STMicroelectronics microcontrollers UltraLow power strategy which also includes STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture, and features. They are all based on STMicroelectronics 0.13 µ ...
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... DDA SSA 12-bit ADC1 Temp sensor voltage COMP 1 COMP 2 12-bit DAC 12-bit DAC1 IF 12-bit DAC 12-bit DAC2 LCD booster Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 @ DD18 V DD =1.65 V Power V SS VOLT. REG. Clocks NRST RESET POR/PDR BOR PVD_IN PVD 64-Kbyte Program ...
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... STM8L162R8, STM8L162M8 IWDG: Independent watchdog LCD: Liquid crystal display POR/PDR: Power on reset / power-down reset RTC: Real-time clock SPI: Serial peripheral interface SWIM: Single wire interface module USART: Universal synchronous asynchronous receiver transmitter WWDG: Window watchdog 3.1 Low power modes The High density STM8L162xx devices support five low power modes to achieve the best ...
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... The high density STM8L162xx devices feature a nested vectored interrupt controller: ● Nested interrupts with 3 software priority levels ● 32 interrupt vectors with hardware priority ● external interrupt sources on 11 vectors ● Trap and reset interrupts 14/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 3.3 Reset and supply management 3.3.1 Power supply scheme The device requires a 1. 3.6 V operating supply voltage (V supply pins must be connected as follows: ● SS1 DD1 for I/Os and for the internal regulator. Provided externally through V corresponding ground pin is V must not be left unconnected. ...
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... Clock security system (CSS): This feature can be enabled by software HSE clock failure occurs, the system clock is automatically switched to HSI. ● Configurable main clock output (CCO): This outputs an external clock for use by the application. 16/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 Figure 2. Clock tree diagram 3.5 Low power real-time clock The real-time clock (RTC independent binary coded decimal (BCD) timer/counter. Six byte locations contain the second, minute, hour (12/24 hour), week day, date, month, year, in BCD (binary coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day months are made automatically ...
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... A 4-channel direct memory access controller (DMA1) offers a memory-to-memory and peripherals-from/to-memory transfer capability. The 4 channels are shared between the following IPs with DMA capability: ADC1, DAC1,DAC2, AES, I2C1, SPI1, SPI2, USART1, USART2, USART3, and the 5 Timers. 18/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 . DD ...
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... STM8L162R8, STM8L162M8 3.9 Analog-to-digital converter ● 12-bit analog-to-digital converter (ADC1) with 28 channels (including 4 fast channel), temperature sensor and internal reference voltage ● Conversion time down to 1 µs with f ● Programmable resolution ● Programmable sampling time ● Single and continuous mode of conversion ● ...
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... TIM5 TIM4 8-bit up 20/121 DMA1 Prescaler factor request generation Any integer from 1 to 65536 Any power of 2 Yes from 1 to 128 Any power of 2 from 1 to 32768 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 . REFINT TM technology. Capture/compare Complementary channels outputs None 0 ...
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... STM8L162R8, STM8L162M8 3.14.1 16-bit advanced control timer (TIM1) This is a high-end timer designed for a wide range of control applications. With its complementary outputs, dead-time control and center-aligned PWM capability, the field of applications is extended to motor control, lighting and half-bridge driver. ● 16-bit up, down and up/down autoreload counter with 16-bit prescaler ● ...
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... Standard mode up to 100 kHz and fast speed modes up to 400 kHz. ● 7-bit and 10-bit addressing modes. ● SMBus 2.0 and PMBus support ● Hardware CRC calculation 2 Note can be served by the DMA1 Controller. 22/121 /2) both for master and slave SYSCLK Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 3.17.3 USART The USART interfaces (USART1, USART2 and USART3) allow full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. ● 1 Mbit/s full duplex SCI ● SPI1 emulation ● ...
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... Pin description 4 Pin description Figure 3. STM8L162M8 80-pin package pinout Figure 4. STM8L162R8 64-pin pinout 24/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 Table 3. Legend/abbreviation Type Level Port and control configuration Reset state Table 4. STM8L162x pin description Pin number Pin name 1 - PH0/LCD SEG PH1/LCD SEG PH2/LCD SEG PH3/LCD SEG 39 ( NRST/PA1 PA2/OSC_IN/ ( [USART1_TX] / (2) [SPI1_MISO] PA3/OSC_OUT/[USART1_ 8 4 (2) ...
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... FT (5) I ( (3) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Default alternate function Timer 2 - channel 1 / LCD segment Port B0 ADC1_IN18/Comparator 1 positive input Timer 3 - channel 1 / LCD segment Port B1 ADC1_IN17/Comparator 1 positive input Timer 2 - channel 2 / LCD segment Port B2 ADC1_IN16/Comparator 1 positive input ...
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... STM8L162R8, STM8L162M8 Table 4. STM8L162x pin description (continued) Pin number Pin name PC3/USART1_TX/ LCD_SEG23/ADC1_IN5 COMP_IN3M/ COMP2_INM/COMP1_INP PC4/USART1_CK/ I2C1_SMB/CCO LCD_SEG24/ADC1_IN4/ COMP2_INM/COMP1_INP PC5/OSC32_IN ( /[SPI1_NSS] / (2) [USART1_TX] PC6/OSC32_OUT/ ( [SPI1_SCK] / (2) [USART1_RX] PC7/LCD_SEG25 ADC1_IN3/COMP2_INM /COMP1_INP PD0/TIM3_CH2/ (2) [ADC1_TRIG LCD_SEG7/ADC1_IN22/ COMP2_INP PD1/TIM3_ETR LCD_COM3/ADC1_IN21/ ...
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... I ( (3) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Default alternate function Timer 1 - channel 3 / LCD segment Port D5 ADC1_IN9/Comparator 1 positive input Timer 1 - break input /LCD segment 20/ADC1_IN8 / X Port D6 RTC calibration/Comparator 1 positive input/Internal reference voltage output Timer 1 - inverted channel 1/ LCD segment 21/ADC1_IN7/ ...
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... STM8L162R8, STM8L162M8 Table 4. STM8L162x pin description (continued) Pin number Pin name PE3/LCD_SEG4 USART2_RX PE4/LCD_SEG5 DAC_TRIG1 PE4/LCD_SEG5 DAC_TRIG2/USART2_TX PE5/LCD_SEG6 ADC1_IN23/COMP1_INP/ COMP2_INP PE5/LCD_SEG6 ADC1_IN23/COMP1_INP/ COMP2_INP/USART2_CK PE6/LCD_SEG26 PVD_IN/TIM5_BKIN PE7/LED_SEG27 TIM5_ETR PI0/RTC_TAMP1 [SPI2_NSS]/[TIM3_CH3] PI1/RTC_TAMP2 [SPI2_SCK] PI2/RTC_TAMP3 [SPI2_MOSI] PI3/TIM5_CH1 [SPI2_MISO]/[TIM3_CH2] PF0/ADC1_IN24 DAC_OUT1 ...
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... FT I ( (3) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Default alternate function ADC1_IN25/ DAC channel 2 output/ X Port F1 [USART3 receive] [SPI1 master out- slave in] ADC1_IN25/ X Port F1 DAC channel 2 output/ [USART3 receive] ADC1_IN26 X Port F2 [SPI2 clock] [USART3 clock] ADC1_IN26 X Port F3 ...
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... STM8L162R8, STM8L162M8 Table 4. STM8L162x pin description (continued) Pin number Pin name 33 PH4/USART2_RX 34 PH5/USART2_TX PH6/USART2_CK/ 35 TIM5_CH1 36 PH7/TIM5_CH2 SSA/ REF DD3 SS3 (7) (2) PA0 /[USART1_CK (8) SWIM/BEEP/IR_TIM SS2 DD2 SS4 DD4 1. At power-up, the PA1/NRST pin is a reset input pin with pull-up used as a general purpose pin (PA1), it can be configured only as output open-drain or push-pull, not as a general purpose input ...
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... As shown in Table 4: STM8L162x pin remapped on different I/O ports by programming one of the two remapping registers described in the “Routing interface (RI) and system configuration controller” section in the STM8L15xx and STM8L16xx reference manual (RM0031). 32/121 description, some alternate functions can be Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 5 Memory and register map 5.1 Memory mapping The memory map is shown in Figure 5. Memory map 0x00 0000 0x00 0FFF 0x00 1000 0x00 17FF 0x00 1800 0x00 47FF 0x00 4800 0x00 48FF 0x00 4900 0x00 4909 0x00 4910 VREFINT_Factory_CONV 0x00 4911 TS_Factory_CONV_V90 ...
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... Port C data output latch register PB_IDR Port C input pin value register PC_DDR Port C data direction register PC_CR1 Port C control register 1 PC_CR2 Port C control register 2 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 End address 0x00 07FF 0x00 0FFF 0x00 FFFF 0x01 7FFF Register name conversion Register name Reset ...
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... STM8L162R8, STM8L162M8 Table 7. I/O port hardware register map (continued) Address Block 0x00 500F 0x00 5010 0x00 5011 Port D 0x00 5012 0x00 5013 0x00 5014 0x00 5015 0x00 5016 Port E 0x00 5017 0x00 5018 0x00 5019 0x00 501A 0x00 501B Port F 0x00 501C ...
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... Reserved area (2 bytes) DMA1_C1CR DMA1 channel 1 configuration register DMA1_C1SPR DMA1 channel 1 status & priority register DMA1 number of data to transfer register DMA1_C1NDTR DMA1 peripheral address high register DMA1_C1PARH Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Register name register register register (channel 0) (channel 0) (channel 0) (channel 0) (channel 0) ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 5083 DMA1 0x00 5084 0x00 5085 DMA1 0x00 5086 0x00 5087 0x00 5088 0x00 5089 0x00 508A 0x00 508B 0x00 508C DMA1 0x00 508D 0x00 508E 0x00 508F 0x00 5090 ...
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... Configurable clock control register CLK_ECKCR External clock control register CLK_SCSR System clock status register CLK_SWR System clock switch register CLK_SWCR Clock switch control register Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Register name Clock RTC register Reset status 0x00 0x00 0x00 0x00 0x00 ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 50CA 0x00 50CB 0x00 50CC 0x00 50CD CLK 0x00 50CE 0x00 50CF 0x00 50D0 0x00 50D1 to 0x00 50D2 0x00 50D3 WWDG 0x00 50D4 0x00 50D5 to 00 50DF 0x00 50E0 0x00 50E1 ...
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... RTC_ALRMASSRH Alarm A subsecond register high RTC_ALRMASSRL Alarm A subsecond register low RTC_ALRMASSMS Alarm A masking register KR Reserved area (3 bytes) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Register name Control register 1 Control register 2 Control register 3 Shift register high Shift register low Alarm A register 1 Alarm A register 2 Alarm A register 3 ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 516A 0x00 516B RTC 0x00 516C 0x00 516D 0x00 516E to 0x00 518A 0x00 5190 CSSLSE 0x00 519A to 0x00 51FF 0x00 5200 0x00 5201 0x00 5202 0x00 5203 SPI1 0x00 5204 ...
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... TIM2 counter high TIM2_CNTRL TIM2 counter low TIM2_PSCR TIM2 prescaler register TIM2_ARRH TIM2 auto-reload register high TIM2_ARRL TIM2 auto-reload register low TIM2_CCR1H TIM2 capture/compare register 1 high Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Reset status 0xC0 0xXX 0x00 0x00 0x00 0x00 0x00 0x00 0x00 ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 5262 0x00 5263 0x00 5264 TIM2 0x00 5265 0x00 5266 0x00 5267 to 0x00 527F 0x00 5280 0x00 5281 0x00 5282 0x00 5283 0x00 5284 0x00 5285 0x00 5286 0x00 5287 ...
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... TIM1 Capture/Compare register 4 high TIM1_CCR4L TIM1 Capture/Compare register 4 low TIM1_BKR TIM1 break register TIM1_DTR TIM1 dead-time register TIM1_OISR TIM1 output idle state register TIM1_DCR1 DMA1 control register 1 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Reset status 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 52D2 TIM1 0x00 52D3 0x00 52D4 to 0x00 52DF 0x00 52E0 0x00 52E1 0x00 52E2 0x00 52E3 0x00 52E4 TIM4 0x00 52E5 0x00 52E6 0x00 52E7 0x00 52E8 0x00 52E9 0x00 52EA ...
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... ADC1_SQR4 ADC1 channel sequence 4 register ADC1_TRIGR1 ADC1 trigger disable 1 ADC1_TRIGR2 ADC1 trigger disable 2 ADC1_TRIGR3 ADC1 trigger disable 3 ADC1_TRIGR4 ADC1 trigger disable 4 Reserved area (46 bytes) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Reset status 0xFF 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1F ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 5380 0x00 5381 0x00 5382 DAC 0x00 5383 0x00 5384 0x00 5385 0x00 5386 to 0x00 5387 0x00 5388 DAC 0x00 5389 0x00 538A to 0x00 538B 0x00 538C DAC 0x00 538D ...
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... DAC_CH2DORH DAC channel 2 data output register high Reset value DAC_CH2DORL DAC channel 2 data output register low Reset value Reserved area Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Register name register high register low register high register low register high register low register high ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 53C0 0x00 53C1 0x00 53C2 0x00 53C3 SPI2 0x00 53C4 0x00 53C5 0x00 53C6 0x00 53C7 0x00 53C8 to 0x00 53CF 0x00 53D0 0x00 53D1 AES 0x00 53D2 0x00 53D3 0x00 53D4 to ...
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... LCD Port mask register 1 LCD_PM2 LCD Port mask register 2 LCD_PM3 LCD Port mask register 3 LCD_PM4 LCD Port mask register 4 LCD_PM5 LCD Port mask register 5 Reserved area (2 bytes) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Reset status 0xC0 0xXX 0x00 0x00 0x00 0x00 0x00 0x00 ...
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... STM8L162R8, STM8L162M8 Table 8. General hardware register map (continued) Address Block 0x00 540C 0x00 540D 0x00 540E 0x00 540F 0x00 5410 0x00 5411 0x00 5412 0x00 5413 0x00 5414 0x00 5415 0x00 5416 LCD 0x00 5417 0x00 5418 0x00 5419 0x00 541A ...
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... Comparator control and status register 1 COMP_CSR2 Comparator control and status register 2 COMP_CSR3 Comparator control and status register 3 COMP_CSR4 Comparator control and status register 4 COMP_CSR5 Comparator control and status register 5 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Reset status 0x00 0x00 0x00 0xXX 0xXX 0xXX 0x00 ...
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... STM8L162R8, STM8L162M8 Table 9. CPU/SWIM/debug module/interrupt controller registers Address Block Register label 0x00 7F00 0x00 7F01 0x00 7F02 0x00 7F03 0x00 7F04 (1) 0x00 7F05 CPU 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B to 0x00 7F5F 0x00 7F60 CPU ...
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... DM_CR1 DM Debug module control register 1 DM_CR2 DM Debug module control register 2 DM Debug module control/status register 1 DM Debug module control/status register 2 DM enable function register Reserved area (5 bytes) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Register name Reset status 0xFF 0xFF 0xFF 0xFF 0xFF ...
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... STM8L162R8, STM8L162M8 6 Interrupt vector mapping Table 10. Interrupt mapping IRQ Source Description No. block RESET Reset TRAP Software interrupt (2) 0 TLI External Top level Interrupt 1 FLASH EOP/WR_PG_DIS 2 DMA1 0/1 DMA1 channels 0/1 3 DMA1 2/3 DMA1 channels 2/3 RTC/LSE_ RTC alarm interrupt/LSE 4 CSS CSS interrupt EXTI PortE/F interrupt/PVD ...
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... The device is woken up from Halt or Active-halt mode only when the address received matches the interface address. 56/121 Wakeup Wakeup from from Halt Active-halt mode mode - - - - - - Yes Yes - - (5) / Yes Yes Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Wakeup Wakeup from Wait from Wait (WFI (WFE (1) mode) mode) (3) - Yes Yes (3) - Yes Yes (3) - Yes Yes (3) - ...
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... STM8L162R8, STM8L162M8 7 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated memory block. All option bytes can be modified in ICP mode (with SWIM) by accessing the EEPROM address. See Table 11 The option bytes can also be modified ‘on the fly’ by the application in IAP mode, except for the ROP, UBC and PCODESIZE values which can only be taken into account when they are modified in ICP mode (with the SWIM) ...
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... OPT4 LSECNT: Number of LSE oscillator stabilization clock cycles 0x00 - 1 clock cycle 0x01 - 16 clock cycles 0x10 - 512 clock cycles 0x11 - 4096 clock cycles 58/121 Option description Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
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... STM8L162R8, STM8L162M8 Table 12. Option byte description (continued) Option byte no. BOR_ON: 0: Brownout reset off 1: Brownout reset on OPT5 BOR_TH[3:1]: Brownout reset thresholds. Refer to according to the value of BOR_TH bits. OPTBL[15:0]: This option is checked by the boot ROM code after reset. Depending on the content of OPTBL addresses 00 480B, 00 480C and 0x8000 (reset vector) the CPU jumps to the bootloader or to the reset vector ...
Page 60
... Y co-ordinate on the wafer 0x4929 0x492A Wafer number 0x492B 0x492C 0x492D 0x492E Lot number 0x492F 0x4930 0x4931 60/121 Unique ID bits U_ID[7:0] U_ID[15:8] U_ID[23:16] U_ID[31:24] U_ID[39:32] U_ID[47:40] U_ID[55:48] U_ID[63:56] U_ID[71:64] U_ID[79:72] U_ID[87:80] U_ID[95:88] Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ...
Page 61
... STM8L162R8, STM8L162M8 9 Electrical parameters 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at T the selected temperature range) ...
Page 62
... Input voltage on true open-drain pins (PC0 and PC1) Input voltage on five-volt tolerant (FT) pins Input voltage on any other pin Electrostatic discharge voltage , and ground (V DD2 DD3 DD4 DDA Table 15. Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Figure 7. STM8L PIN Min Max - 0 ...
Page 63
... STM8L162R8, STM8L162M8 Table 15. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by IR_TIM pin (with high sink LED driver capability Output current sunk by any other I/O and control pin Output current sourced by any I/Os and control pin ...
Page 64
... A (7 suffix version) -40 °C T 125 ° suffix version) =( with T in this table and Dmax Jmax A JA Jmax Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 . Min. Max 1.65 3.6 (2) 1.8 1.65 3.6 DD 1.8 3.6 288 288 288 288 131 ...
Page 65
... STM8L162R8, STM8L162M8 9.3.2 Embedded reset and power control block characteristics Table 18. Embedded reset and power control block characteristics Symbol Parameter V rise time rate DD t VDD V fall time rate DD t Reset release delay TEMP V Power-on reset threshold POR V Power-down reset threshold PDR Brown-out reset threshold 0 ...
Page 66
... Falling edge 1.98 Rising edge 2.08 Falling edge 2.2 Rising edge 2.28 Falling edge 2.39 Rising edge 2.47 Falling edge 2.57 Rising edge 2.68 Falling edge 2.77 Rising edge 2.87 Falling edge 2.97 Rising edge 3.08 BOR0 threshold All BOR and PVD thresholds excepting BOR0 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Max. Unit Typ. 1.84 1.88 1.94 1.99 2.04 2.09 2.14 2.18 2.24 2.28 2.34 2.38 2.44 2.48 V 2.54 2.58 2.64 2.69 2.74 2.79 2.83 2.88 2.94 2.99 3 ...
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... STM8L162R8, STM8L162M8 Figure 8. Power supply thresholds 100 mV PVD hysteresis 100 mV V BOR hysteresis POR PDR PVD output BOR reset (NRST) BOR/PDR reset (NRST) POR/PDR reset (NRST) PVD BOR always active BOR disabled by option byte POR/PDR (BOR not available) ...
Page 68
... MHz 0.95 (8) CPU MHz 1.73 CPU LSI RC osc 0.029 0.035 CPU LSI (typ. 38 kHz) LSE external clock 0.028 0.034 CPU LSE (32.768 kHz) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 or V (no load Max. 85 °C 105 °C 125 °C 55°C (2) (3) (4) 0.28 0.39 0.47 0.51 0.38 0.49 0.57 0.61 0.65 ...
Page 69
... STM8L162R8, STM8L162M8 Table 19. Total current consumption in Run mode (continued) Para Symbol meter All peripherals OFF, code Supply executed current I DD(RUN) from Flash, in Run V from mode All peripherals OFF, V from 1. 3.6 V, HSI internal RC osc For devices with suffix 6 3. For devices with suffix 7 4 ...
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... Typical current consumption measured with code executed from Flash. 70/121 from RAM vs. V DD(RUN 2.2 2.4 2.6 from Flash vs. V DD(RUN) 2.2 2.4 2.6 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 (HSI clock source), f =16 MHz CPU 25°C 85°C 105°C 125°C -40°C 2.8 3 3.2 3.4 (HSI clock source MHz ...
Page 71
... STM8L162R8, STM8L162M8 In the following table, data are based on characterization results, unless otherwise specified. Table 20. Total current consumption in Wait mode Symbol Parameter CPU not clocked, all peripherals OFF, code Supply executed from I current in RAM DD(Wait) Wait mode with Flash in I mode, DDQ ...
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... MHz clock CPU (f = CPU MHz CPU HSE MHz CPU LSI CPU LSI (8) LSE external clock CPU LSE (32.768 kHz) CPU Table 30. Table 31 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Max Typ 85 °C 105 °C 125 °C 55°C (2) (3) 0.36 0.42 0.46 0.29 0.38 0.44 0.48 0.37 0.46 0.52 0.56 0.45 0.55 0.61 0.65 0.69 0.79 0.85 0.89 0.29 0.32 0.4 0.24 0.31 ...
Page 73
... STM8L162R8, STM8L162M8 Figure 11. Typical I 0.8 0.7 0.6 0.5 0.4 0.3 0.2 1.8 1. Typical current consumption measured with code executed from RAM. Figure 12. Typical I 0.8 0.7 0.6 0.5 0.4 0.3 0.2 1 Typical current consumption measured with code executed from Flash. from RAM vs. V (HSI clock source), f DD(Wait 2.2 2.4 2.6 2.8 from Flash (HSI clock source), f DD(Wait) 2.2 2.4 2.6 2.8 V (V) ...
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... Refer to DD LSE 74/121 Conditions all peripherals OFF LSI RC osc. (at 38 kHz) with TIM2 active all peripherals OFF (3) LSE external clock (32.768 kHz) with TIM2 active Table 31 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 = 1. (1) Typ. Max -40 °C A 5.86 6. ° °C 6.52 7. ° ...
Page 75
... STM8L162R8, STM8L162M8 Figure 13. Typical I 0.02 0.015 0.01 0.005 0 1.8 vs. V (LSI clock source), all peripherals OFF DD(LPR 2.2 2.4 2.6 Doc ID 17959 Rev 2 Electrical parameters 2.8 3 3.2 3.4 25°C 85°C 105°C 125°C -40°C 3.6 75/121 ...
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... DD LSE 76/121 Conditions all peripherals OFF LSI RC osc. (at 38 kHz) with TIM2 active all peripherals OFF LSE external (3) clock (32.768 kHz) with TIM2 active Table 31. Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 = 1. 3 (1) Typ -40 ° °C 3. °C 3. °C 4.6 ...
Page 77
... STM8L162R8, STM8L162M8 Figure 14. Typical I 0.02 0.015 0.01 0.005 0 1.8 1. Typical current consumption measured with code executed from RAM. vs. V (LSI clock source), all peripherals OFF DD(LPW 2.2 2.4 2.6 Doc ID 17959 Rev 2 Electrical parameters 25°C 85°C 105°C 125°C -40°C 2.8 3 3.2 3.4 (1) 3.6 77/121 ...
Page 78
... A (1/4 duty °C external A ( 105 °C LCD 125 ° -40 ° °C A LCD °C A (1/4 duty °C internal A ( 105 °C LCD 125 °C A Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Typ. Max. Unit 0.92 2.25 1.32 3.44 1.63 3.87 3 7.94 5.6 13.8 1.56 3.6 1.64 3.8 2.12 5.03 3.34 8.2 5.83 14.4 A 1.92 4.56 2.1 4.97 2.6 6.14 3.62 8.49 6.1 15.92 4.2 9.88 4.39 10.32 4.84 11.5 5. ...
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... STM8L162R8, STM8L162M8 Table 23. Total current consumption and timing in Active-halt mode 1. 3.6 V (continued) DD Symbol Parameter Supply current in I DD(AH) Active-halt mode Supply current during wakeup time from I DD(WUFAH) Active-halt mode (using HSI) Wakeup time from (8)(9) Active-halt mode to t WU_HSI(AH) Run mode (using HSI) ...
Page 80
... RTC clock is LSE divided by 32. Figure 15. Typical I 0.02 0.015 0.01 0.005 0 80/121 . WU Parameter vs. V (LSI clock source) DD(AH) DD 1.8 2 2.2 2.4 2.6 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 (1) Condition Typ. LSE = 1.8 V (3) LSE/32 LSE = 3 V (3) LSE/32 LSE = 3.6 V (3) LSE/32 25°C 85°C 105°C 125°C -40°C 2.8 3 3.2 3.4 3.6 Unit 1 ...
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... STM8L162R8, STM8L162M8 In the following table, data are based on characterization results, unless otherwise specified. Table 25. Total current consumption and timing in Halt mode at V Symbol Supply current in Halt mode I (Ultra low power ULP bit =1 in DD(Halt) the PWR_CSR2 register) Supply current during wakeup ...
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... Parameter (1) (1) (1) (1) (1) (2) (3) (4) (1) (1) (1) (5) (6) (7) (8) Slow mode (8) Fast mode (9) including LSI supply current excluding LSI supply current Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Typ. Unit µA/MHz 1500 370 0.160 ...
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... STM8L162R8, STM8L162M8 3. Data based on a differential I measurement between the on-chip peripheral in reset configuration and not clocked and DD the on-chip peripheral when clocked and not kept under reset. The CPU is in Wait mode in both cases. No I/O pins toggling. Not tested in production. 4. Data based on a differential I ...
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... T DD Parameter 0 Conditions pF MHz OSC pF, f =16 MHz OSC V is stabilized DD . LOAD Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 . A Min. Typ. Max. 32.768 0 0.6 ±1 Min. Typ. Max ...
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... STM8L162R8, STM8L162M8 Figure 17. HSE oscillator circuit diagram Resonator C L2 HSE oscillator critical g 2 mcrit R : Motional resistance (see crystal specification Motional capacitance (see crystal specification), Co: Shunt capacitance (see crystal specification =C: Grounded external capacitance ...
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... V, -10 °C T 125 ° 1.65 V V 3 -40 °C T 125 °C A Trimming code multiple of 16 Trimming code = multiple of 16 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 f LSE F m Consumption control STM8 . A Min. Typ. Max. 16 (2) ...
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... STM8L162R8, STM8L162M8 Figure 19. Typical HSI frequency vs. V Low speed internal RC oscillator (LSI) In the following table, data are based on characterization results, not tested in production. Table 33. LSI oscillator characteristics Symbol f Frequency LSI t LSI oscillator wakeup time su(LSI) LSI oscillator frequency D (LSI) (3) drift 1. 3 ...
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... Minimum supply voltage without losing data stored in RAM (in Halt mode or under Reset hardware registers (only in Halt mode). Guaranteed by characterization, not tested in production. 88/121 2 2.2 2.4 2.6 2.8 Parameter Conditions (1) Halt mode (or Reset) Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 DD 25°C 85°C 105°C 125°C -40°C 3 3.2 3.4 3.6 Min. Typ. ...
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... STM8L162R8, STM8L162M8 Flash memory Table 35. Flash program and data EEPROM memory Symbol Parameter Operating voltage V DD (all modes, read/write/erase) Programming time for 1 or 128 bytes (block) erase/write cycles (on programmed byte) t prog Programming time for 1 to 128 bytes (block) write cycles (on erased byte) ...
Page 90
... I/O for example or an external pull-up or pull-down resistor. 90/121 Functional susceptibility Description Negative injection and T unless otherwise specified. All DD A Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 or SS Unit Positive injection - ...
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... STM8L162R8, STM8L162M8 Table 37. I/O static characteristics Symbol Parameter V Input low level voltage IL V Input high level voltage IH V Schmitt trigger voltage hysteresis hys I Input leakage current lkg R Weak pull-up equivalent resistor PU C I/O pin capacitance 3 -40 to 125 °C unless otherwise specified. ...
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... Electrical parameters Figure 21. Typical V Figure 22. Typical V Figure 23. Typical pull-up resistance R 92/121 and V vs. V (standard I/Os and V vs. V (true open drain I/Os vs Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 with ...
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... STM8L162R8, STM8L162M8 Figure 24. Typical pull-up current I Output driving current Subject to general operating conditions for V Table 38. Output driving current (high sink ports) I/O Symbol Type (1) V Output low level voltage for an I/O pin OL (2) Output high level voltage for an I/O pin The I current sunk must always respect the absolute maximum rating specified in ...
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... OL sink ports) Figure 27. Typical open drain ports) 94/121 Parameter . VSS Parameter . VSS = 3.0 V (high Figure 26. Typical 3.0 V (true Figure 28. Typical V DD Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Conditions Min. Max mA mA Table 15 and the sum Conditions Min ...
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... STM8L162R8, STM8L162M8 Figure 29. Typical (high sink ports) NRST pin Subject to general operating conditions for V Table 41. NRST pin characteristics Symbol Parameter V NRST input low level voltage IL(NRST) V NRST input high level voltage IH(NRST) V NRST output low level voltage OL(NRST) V NRST input hysteresis ...
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... The minimum recommended capacity is 10 nF. Figure 33. Recommended NRST pin configuration EXTERNAL RESET CIRCUIT 96/121 PU vs Figure 33 protects the device against parasitic resets. The user RSTIN 0.1 F Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 vs max. level specified in IL INTERNAL RESET Filter STM8L ...
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... STM8L162R8, STM8L162M8 9.3.8 Communication interfaces SPI1 - Serial peripheral interface Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions summarized in the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 42. SPI1 characteristics Symbol Parameter f SCK SPI1 clock frequency 1/t c(SCK) t SPI1 clock rise and fall ...
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... OUT h(SI) t c(SCK) t v(SO OUT t h(SI and 0. Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 t h(NSS) t r(SCK) t dis(SO) t f(SCK) LSB OUT LSB IN ai14134 (1) t h(NSS) t r(SCK) t h(SO) t dis(SO) t f(SCK) LSB OUT LSB IN ai14135 ...
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... STM8L162R8, STM8L162M8 Figure 36. SPI1 timing diagram - master mode High NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 t su(MI) MISO INP UT MOSI OUTUT 1. Measurement points are done at CMOS levels: 0.3V (1) t c(SCK) t w(SCKH) t w(SCKL) MS BIN h(MI OUT OUT t v(MO) t h(MO) and 0 ...
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... The above variations depend on the accuracy of the external components used. 100/121 , f DD SYSCLK Standard mode I Parameter (2) Min. 4.7 4.0 250 0 4.0 4.7 4.0 4 protocol requirement, not tested in production. Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 , and T unless otherwise specified communication 2 2 (1) C Fast mode I C (2) (2) (2) Max. Min. Max. 1.3 0.6 100 ...
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... STM8L162R8, STM8L162M8 Figure 37. Typical application with I 4.7k BUS SDA t f(SDA) SCL t h(STA) 1. Measurement points are done at CMOS levels: 0 9.3.9 LCD controller In the following table, data are guaranteed by Design, not tested in production. Table 44. LCD characteristics Symbol V LCD V LCD0 V LCD1 V LCD2 V LCD3 ...
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... the total low value resistive network. LN VLCD external capacitor The application can achieve a stabilized LCD reference voltage by connecting an external capacitor C to the V EXT 102/121 pin specified in Table LCD EXT Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 44. ...
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... STM8L162R8, STM8L162M8 9.3.10 Embedded reference voltage In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 45. Reference voltage characteristics Symbol Parameter Internal reference voltage I REFINT consumption ADC sampling time when reading the (1)(2) T S_VREFINT internal reference voltage Internal reference voltage buffer ...
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... Average slope Consumption Temperature sensor startup time temperature sensor = 3 V ±10 mV. The 8 LSB of the V DD Parameter value 400 value 10 (1) (2) ( ±10 mV. DD Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Min. Typ. Max. 0.580 0.597 0.614 ±1 ±2 1.59 1.62 1.65 3 ADC conversion result are stored in the 90 Min ...
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... STM8L162R8, STM8L162M8 In the following table, data are guaranteed by design, not tested in production. Table 48. Comparator 2 characteristics Symbol V Analog supply voltage DDA T Temperature range A V Comparator input voltage range IN Startup time after enable in fast mode t START Startup time after enable in slow mode (1) t Propagation delay in fast mode ...
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... 5 k, C 5 k, C 5 k, C Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Min. Typ. Max. 1.8 3.6 V 1.8 DDA 130 220 220 350 210 320 320 520 -40 125 ...
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... STM8L162R8, STM8L162M8 In the following table, data based on characterization results, not tested in production. Table 50. DAC accuracy Symbol Parameter DNL Differential non linearity INL Integral non linearity (4) Offset Offset error Offset1 Offset error at Code 1 (6) Gain error Gain error TUE Total unadjusted error 1 ...
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... VV DDA 0.320 without zooming 2.4 V 1.8 VV DDA 0.320 with zooming V on PF0/1/2/3 fast AIN channels V on all other AIN channels Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Typ. Max. Unit 3 DDA V V DDA V V SSA 1000 1450 µA 700 µ ...
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... STM8L162R8, STM8L162M8 Table 52. ADC1 characteristics (continued) Symbol Parameter t Sampling time S t 12-bit conversion time conv Wakeup time from OFF t WKUP state Time before a new (5) t IDLE conversion Internal reference t VREFINT voltage startup time 1. The current consumption through V - one constant (max 300 µA) - one variable (max 400 µ ...
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... Differential non linearity Integral non linearity Total unadjusted error Offset error Gain error + = 2.4 V DDA REF Parameter Differential non linearity Integral non linearity Total unadjusted error Offset error Gain error Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Typ. Max. Unit 1 1.6 1 1.6 1 1.5 1.2 2 1.2 1.8 LSB 1.2 1.7 2 ...
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... STM8L162R8, STM8L162M8 Figure 38. ADC1 accuracy characteristics [1LSB = IDEAL 4095 4094 4093 SSA Figure 39. Typical connection diagram using the ADC 1. Refer to Table represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the parasitic pad capacitance (roughly 7 pF) ...
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... Electrical parameters Figure 40. Power supply and reference decoupling (V Figure 41. Power supply and reference decoupling (V 112/121 1 µ µ µ Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 V not connected to REF+ DDA STM8L V REF+ V DDA V SSA /V REF- ai17031 V ) connected to REF+ DDA STM8L V /V REF+ ...
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... STM8L162R8, STM8L162M8 9.3.15 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until a failure occurs (indicated by the LEDs). ...
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... DD +25 ° MHz to 130 MHz A LQFP80 130 MHz to 1 GHz conforming to IEC61967-2 SAE EMI Level Ratings Conditions T Parameter Static latch-up class Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Max vs. 16 MHz 1.5 Maximum (1) value 2000 +25 °C A 750 Class II Unit dB ...
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... STM8L162R8, STM8L162M8 9.4 Thermal characteristics The maximum chip junction temperature (T Table 17: General operating conditions on page The maximum chip-junction temperature, T the following equation: Where: is the maximum ambient temperature in C ● T Amax is the package junction-to-ambient thermal resistance in C/W ● JA ● the sum of P Dmax ● ...
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... Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. 116/121 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 ® ...
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... STM8L162R8, STM8L162M8 Figure 42. 80-pin low profile quad flat package ( mm) Table 61. 80-pin low profile quad flat package mechanical data Symbol ccc 1. Values in inches are converted from mm and rounded to four decimal places. mm Min Typ ...
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... N 1. Values in inches are converted from mm and rounded to 4 decimal digits. 118/121 (1) millimeters Typ Max 1.60 0.15 1.40 1.45 0.22 0.27 0.20 12.00 10.00 12.00 10.00 0.50 3.5° 7° 0.60 0.75 1.00 Number of pins 64 Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Figure 44. Recommended (1)(2) footprint 0.5 12.7 10.3 10 7.8 12.7 (1) inches Min Typ 0.0020 0.0531 0.0551 0.0067 0.0087 0.0035 0.4724 ...
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... STM8L162R8, STM8L162M8 11 Ordering information scheme Table 63. Ordering information scheme Example: Device family STM8 microcontroller Product type L = Low power Device subfamily 162: STM8L162 device family Pin count pins pins Program memory size Kbytes of Flash memory Package T = LQFP Temperature range 3 = Industrial temperature range, – ...
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... Table 15: Current characteristics: updated Table 34: RAM and hardware retention. Added Table 9.3.6: I/O current injection Table 37: I/O static characteristics: updated Table 44: LCD characteristics: updated Doc ID 17959 Rev 2 STM8L162R8, STM8L162M8 Changes description: updated map: updated the address range of registers: updated VRM data min. characteristics. ...
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... STM8L162R8, STM8L162M8 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...