STR750FV2 STMicroelectronics, STR750FV2 Datasheet - Page 11

• Manufacturer Part Number: STR750FV2
• Description: ARM7TDMI-S™ 32-BIT MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
• Manufacturer: STMicroelectronics

Specifications of STR750FV2

• Smart Low Power Modes: SLOW, WFI, STOP and STANDBY with backup registers
• Conversion Time: min. 3.75 μs

STR750Fxx STR751Fxx STR752Fxx STR755Fxx
3.2
PWM_EMERGENCY
Block diagram
Figure 1.
2xICAP, 2xOCMP
2xICAP, 2xOCMP
2xICAP, 2xOCMP
PWM1, PWM1N
PWM2, PWM2N
PWM3, PWM3N
VDDA_ADC
VSSA_ADC
SCLK, MOSI
MISO as AF
AF: alternate function on I/O port pin
Note: I/Os shown for 100 pin devices. 64-pin devices have the I/O set shown in
4 CS as AF
BOOT1,
BOOT0
NJTRST
P1[19:0]
as AF
TEST
JTMS
JTDO
15AF
P0[31:0]
P2[19:0]
JTCK
as AF
JTDI
16AF
as AF
as AF
as AF
as AF
STR750 block diagram
JTAG & ICE-RT
ARM7TDMI-S
GPIO PORT 0
GPIO PORT 1
GPIO PORT 2
WATCHDOG
TIM0 TIMER
PWM TIMER
TIM1 TIMER
SERIAL MEMORY
TIM2 TIMER
4 streams
10-bit ADC
TB TIMER
WAKEUP
GP DMA
60MHz
EXT.IT
INTERFACE
CPU
RTC
AHB
AHB
Arbiter
BRIDGE
APB
APB (up to 32 MHz)
INTERRUPT CTL
FLASH 256KB
+16KB (RWW)
SRAM 16KB
NESTED
CK_RTC
CK_SYS
CK_USB
HCLK
PCLK
HRESETN
PRESETN
V
V
V
32xIRQ
2xFIQ
DDA_ADC
DDA_PLL
MANAGE-
BACKUP
V
V
CLOCK
MENT
DD_IO
CORE
2x(16x8bit)
2x(16x8bit)
2x(16x8bit)
2x(8x16bit)
2x(8x16bit)
USB Full Speed
FIFO
FIFO
FIFO
FIFO
FIFO
CAN 2.0B
LOW POWER
3.3V TO 1.8V
I2C
RESET &
PLL
POWER
Figure
DC-DC
MAIN
UART0
UART1
UART2
SSP0
SSP1
FREE
OSC
OSC
OSC
OSC
32K
4M
LP
3.
Introduction
NRSTIN
NRSTOUT
V
V
V
V
DD_IO
18
18BKP
SS
RX,TX,CTS,
RTS
RTC_XT1
RTC_XT2
XT1
XT2
V
V
RX,TX,CTS,
RTS as AF
RX,TX,CTS,
RTS as AF
MOSI,MISO,
SCK,NSS
as AF
MOSI,MISO,
SCK,NSS
as AF
SCL,SDA
as AF
DDA_PLL
SSA_PLL
RX,TX
as AF
USBDP
USBDM
as AF
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