DS1337 Maxim, DS1337 Datasheet
DS1337
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DS1337 Summary of contents
Page 1
... GENERAL DESCRIPTION The DS1337 serial real-time clock is a low-power clock/calendar with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially through bus. The clock/calendar provides seconds, minutes, hours, day, date, month, and year information ...
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... SYMBOL CONDITIONS I (Note (Note (Note (Note 4) CCA I (Notes 5, 6) CCS SYMBOL CONDITIONS I (Notes CCTOSC I (Notes 5, 9) CCTDDR DS1337 I C Serial Real-Time Clock MIN TYP MAX 1.8 3.3 5.5 1.3 1 5.5 -0.3 +0 MIN TYP MAX - 150 1 ...
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... Fast mode t SU:STO Standard mode C (Note 14 (Note 15) I/O t OSF = 0.0V CC. = 0.0V CC. 5.5V. Time and date are maintained when 1.3V DS1337 I C Serial Real-Time Clock MIN TYP MAX 100 400 0 100 1.3 4.7 0.6 4.0 1.3 4.7 0.6 4.0 0.6 4.7 0 0.9 0 100 250 20 + 0.1C 300 ...
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... V CC ≤ V ≤ CC(MAX CCS 125 100 75 50 INTCN = 1 (Squarew ave off 3.3 3.8 4.3 4.8 5 3.0V CC 32768.35 32768.3 32768.25 32768.2 32768.15 32768.1 32768.05 32768 40.0 60.0 80.0 ( DS1337 I C Serial Real-Time Clock I vs. V CCA CC 1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 V (V) CC OSCILLATOR FREQUENCY vs 1.3 1.8 2.3 2.8 3.3 3.8 4.3 4.8 V (V) CC ...
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... Application Note 58: Crystal Considerations with Dallas Real-Time Clocks. An external 32.768kHz oscillator can also drive the DS1337. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated. Interrupt Output. When enabled, INTA is asserted low when the time/day/date matches the values set in the alarm registers ...
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... ADDRESS REGISTER SDA DETAILED DESCRIPTION The Block Diagram shows the main elements of the DS1337. As shown, communications to and from the DS1337 2 occur serially over bus. The DS1337 operates as a slave device on the serial bus. Access is obtained by implementing a START condition and providing a device identification code, followed by data. Subsequent registers can be accessed sequentially until a STOP condition is executed ...
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... The DS1337C integrates a standard 32,768Hz crystal in the package. Typical accuracy at nominal V is approximately +10ppm. Refer to Application Note 58 for information about crystal accuracy vs. temperature. OPERATING MODES The amount of current consumed by the DS1337 is determined, in part, by the I operation. The following table shows the relationship between the operating mode and the corresponding I parameter. ...
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... ADDRESS MAP Table 2 shows the address map for the DS1337 registers. During a multibyte access, when the address pointer reaches the end of the register space (0Fh) it wraps around to location 00h pointer incrementing to location 00h, the current time is transferred to a second set of registers. The time information is read from these secondary registers, while the clock may continue to run ...
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... The 1Hz square-wave output, if enable, transitions high 500ms after the seconds data transfer, provided the oscillator is already running. The DS1337 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12- or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20– ...
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... SPECIAL-PURPOSE REGISTERS The DS1337 has two additional registers (control and status) that control the RTC, alarms, and square-wave output. Control Register (0Eh) Bit 7 Bit 6 EOSC 0 Bit 7: Enable Oscillator (EOSC). This active-low bit when set to logic 0 starts the oscillator. When this bit is set to logic 1, the oscillator is stopped ...
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... A1IE bit is also logic 1, the INTA pin goes low. A1F is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write to logic 1 leaves the value unchanged. Bit 5 Bit 4 Bit DS1337 I C Serial Real-Time Clock Bit 2 Bit 1 Bit 0 0 A2F A1F ...
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... The device that controls the message is called a master. The devices that are controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions must control the bus. The DS1337 operates slave on the I C bus ...
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... START condition. The slave address byte contains the 7-bit DS1337 address, which is 1101000, followed by the direction bit (R/W), which, for a read After receiving and decoding the slave address byte the device outputs an acknowledge on the SDA line. The DS1337 then begins to transmit data starting with the register address pointed to by the register pointer ...
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... BYTES + ACKNOWLEDGE) NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK <Slave Address> 1101000 1 A <Data(n+2)> <Data(n+X)> XXXXXXXX A P ... DATA TRANSFERRED (X+1 BYTES + ACKNOWLEDGE) NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK DS1337 I C Serial Real-Time Clock <Data(n+X)> ... XXXXXXXX A P <Data(n+X)> ... XXXXXXXX ...
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... HANDLING, PC BOARD LAYOUT, AND ASSEMBLY The DS1337C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal. Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line ...
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... The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor. DESCRIPTION EC table range time. © 2009 Maxim Integrated Products 2 DS1337 I C Serial Real-Time Clock PAGES CHANGED ...