DS1337 Maxim, DS1337 Datasheet - Page 11

• Manufacturer Part Number: DS1337
• Description: The DS1337 serial real-time clock is a low-power clock/calendar with two programmable time-of-day alarms and a programmable square-wave output
• Manufacturer: Maxim

2
DS1337 I
C Serial Real-Time Clock
Bit 1: Alarm 2 Interrupt Enable (A2IE). When set to logic 1, this bit permits the alarm 2 flag (A2F) bit in the status
register to assert INTA (when INTCN = 0) or to assert SQW/INTB (when INTCN = 1). When the A2IE bit is set to
logic 0, the A2F bit does not initiate an interrupt signal. The A2IE bit is disabled (logic 0) when power is first
applied.
Bit 0: Alarm 1 Interrupt Enable (A1IE). When set to logic 1, this bit permits the alarm 1 flag (A1F) bit in the status
register to assert INTA. When the A1IE bit is set to logic 0, the A1F bit does not initiate the INTA signal. The A1IE
bit is disabled (logic 0) when power is first applied.
Status Register (0Fh)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
OSF
0
0
0
0
0
A2F
A1F
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator either is stopped or was stopped
for some period of time and may be used to judge the validity of the clock and calendar data. This bit is set to logic
1 anytime that the oscillator stops. The following are examples of conditions that can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on V
is insufficient to support oscillation.
CC
3) The EOSC bit is turned off.
4) External influences on the crystal (e.g., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0.
Bit 1: Alarm 2 Flag (A2F). A logic 1 in the alarm 2 flag bit indicates that the time matched the alarm 2 registers.
This flag can be used to generate an interrupt on either INTA or SQW/INTB depending on the status of the INTCN
bit in the control register. If the INTCN bit is set to logic 0 and A2F is at logic 1 (and A2IE bit is also logic 1), the
INTA pin goes low. If the INTCN bit is set to logic 1 and A2F is logic 1 (and A2IE bit is also logic 1), the SQW/INTB
pin goes low. A2F is cleared when written to logic 0. This bit can only be written to logic 0. Attempting to write to
logic 1 leaves the value unchanged.
Bit 0: Alarm 1 Flag (A1F). A logic 1 in the alarm 1 flag bit indicates that the time matched the alarm 1 registers. If
the A1IE bit is also logic 1, the INTA pin goes low. A1F is cleared when written to logic 0. This bit can only be
written to logic 0. Attempting to write to logic 1 leaves the value unchanged.
11 of 16