71M6543F Maxim, 71M6543F Datasheet - Page 112

• Manufacturer Part Number: 71M6543F
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

71M6543F/H and 71M6543G/GH Data Sheet
112
Name
MUX8_SEL[3:0]
MUX9_SEL[3:0]
MUX10_SEL[3:0]
MUX_DIV[3:0]
OPT_BB
OPT_FDC[1:0]
OPT_RXDIS
OPT_RXINV
OPT_TXE [1,0]
OPT_TXINV
OPT_TXMOD
OSC_COMP
PB_STATE
PERR_RD
PERR_WR
SFR FC[6]
SFR FC[5]
SFR F8[0]
Location Rst Wk Dir
2101[3:0]
2101[7:4]
2100[3:0]
2100[7:4]
2457[5:4]
2456[3:2] 00 –
28A0[5]
2457[0]
2457[2]
2457[1]
2456[0]
2456[1]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
–
–
–
–
–
–
–
0
0
© 2008–2011 Teridian Semiconductor Corporation
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Description
Selects which ADC input is to be converted during time slot 8.
Selects which ADC input is to be converted during time slot 9.
Selects which ADC input is to be converted during time slot 10.
MUX_DIV[3:0] is the number of ADC time slots in each MUX frame. The maximum
number of time slots is 11.
Configures the input of the optical port to be a DIO pin to allow it to be
bit-banged. In this case, DIO5 becomes a third high speed UART. Refer to
and Optical Interface
heading on page 57.
Selects OPT_TX modulation duty cycle
OPT_RX can be configured as an input to the optical UART or as SEGDIO55.
OPT_RXDIS = 0 and LCD_MAP[55] = 0: OPT_RX
OPT_RXDIS = 1 and LCD_MAP[55] = 0: DIO55
OPT_RXDIS = 0 and LCD_MAP[55] = 1: SEG55
OPT_RXDIS = 1 and LCD_MAP[55] = 1: SEG55
Inverts result from OPT_RX comparator when 1. Affects only the UART input. Has no
effect when OPT_RX is used as a DIO input.
Configures the OPT_TX output pin.
If LCD_MAP[51] = 0:
If LCD_MAP[51] = 1:
Invert OPT_TX when 1. This inversion occurs before modulation.
Enables modulation of OPT_TX. When OPT_TXMOD is set, OPT_TX is modulated
when it would otherwise have been zero. The modulation is applied after any inversion
caused by OPT_TXINV.
Enables the automatic update of RTC_P[16:0] and RTC_Q [1:0]every time the temperature
is measured.
The de-bounced state of the PB pin.
The 71M6543 sets these bits to indicate that a parity error on the remote sensor has
been detected. Once set, the bits are remembered until they are cleared by the MPU.
OPT_FDC
00
01
10
11
00 = DIO51, 01 = OPT_TX, 10 = WPULSE, 11 = VPULSE
xx = SEG51
Function
50% Low
25% Low
12.5% Low
6.25% Low
=under the “Bit Banged Optical UART (Third UART)” sub-
2.5.9 UART
v1.2