71M6543F Maxim, 71M6543F Datasheet - Page 153

• Manufacturer Part Number: 71M6543F
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

26, 40,
48, 49,
50, 73,
74, 77,
78, 79
Pin
v1.2
91
55
54
81
90
RESET
Name
TEST
RX
NC
PB
TX
© 2008–2011 Teridian Semiconductor Corporation
Type
N/C
O
I
I
I
I
Circuit
—
2
3
4
7
3
Chip Reset. This input pin is used to reset the chip into a
known state. For normal operation, this pin is pulled low. To
reset the chip, this pin should be pulled high. This pin has
an internal 30 μA (nominal) current source pulldown. No
external reset circuitry is necessary.
UART0 Input. If this pin is unused it must be terminated
to V3P3D or GNDD.
UART0 Output
Enables Production Test. This pin must be grounded in
normal operation.
Pushbutton Input. This pin must be at GNDD when not active
or unused. A rising edge sets the WF_PB flag. It also
causes the part to wake up if it is in SLP or LCD mode. PB
does not have an internal pullup or pulldown resistor.
No Connection. Do not connect this pin.
71M6543F/H and 71M6543G/GH Data Sheet
Function
153