TB6596FLG Toshiba, TB6596FLG Datasheet - Page 9

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TB6596FLG

Manufacturer Part Number
TB6596FLG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TB6596FLG

Function
Driver
Vopmax (vm*)
5.5V (6V)
Io (lpeak)
0.6A (0.8A)
Channel
6-ch
I/f
serial input
Option
Const current x2
Package
QON36
Rohs Compatible†
yes
Speed Control
The FLL speed discriminator compares the FG signal against the reference speed which is derived from an
external CLK.
The speed discriminator has two counters that alternately count one cycle of the FG signal. It then generates
error pulses (charge and discharge) according to the frequency difference. Based on these pulses, the integrator
(set by an external RC) and the PWM control amplifier generates a motor drive output signal to control the motor
rotational speed.
The reference speed of the speed discriminator is selectable from 16 levels between 250 and 1750 Hz in 100-Hz
steps. (It is selected by serial data inputs.)
The motor rotation speed (N) is calculated by the following equation:
N (rpm) = f
Charge pump
External CLK
Counter 1
Counter 2
FG signal
Z: Number of FG pulses per rotor rotation
CT: Speed discriminator count
DVO
FG
CLK
(Hz)/CT × 60/Z
Comparison reference speed
(16 levels in 100-Hz steps)
Speed Discriminator
= 250 to 1750 (Hz)
9
Charge pump
variable gain
Integrator
DVO
PWM control
amp
TB6596FLG
2008-01-29

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