TMP86xy09NG Toshiba, TMP86xy09NG Datasheet - Page 67

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TMP86xy09NG

Manufacturer Part Number
TMP86xy09NG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy09NG

Package
SDIP32
Rom Types (m=mask,p=otp,f=flash)
M/F
Rom Size
8/16
Ram Size
256/512
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
-
Adc 10-bit Channels
6
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Dual Clock
Clock Gear
-
Number Of I/o Ports
26
Power Supply (v)
2.7 to 5.5
7. Watchdog Timer (WDT)
7.1 Watchdog Timer Configuration
rious noises or the deadlock conditions, and return the CPU to a system recovery routine.
rupt request”. Upon the reset release, this signal is initialized to “reset request”.
rupt.
Internal reset
The watchdog timer is a fail-safe system to detect rapidly the CPU malfunctions such as endless loops due to spu-
The watchdog timer signal for detecting malfunctions can be programmed only once as “reset request” or “inter-
When the watchdog timer is not used to detect malfunctions, it can be used as the timer to provide a periodic inter-
Note: Care must be taken in system design since the watchdog timer functions are not be operated completely due to
fc/2
fc/2
fc/2
fc/2
23
21
19
17
or fs/2
or fs/2
or fs/2
effect of disturbing noise.
or fs/2
15
13
11
9
WDTT
2
0034
WDTEN
Watchdog timer control registers
H
WDTCR1
Figure 7-1 Watchdog Timer Configuration
Clock
Clear
S R
Q
Binary counters
Writing
disable code
1
Controller
0035
2
H
WDTCR2
Overflow
Page 57
Writing
clear code
WDT output
WDTOUT
Reset release
Interrupt request
R
S
Q
TMP86C809NG
Reset
request
INTWDT
interrupt
request

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