74LVX244MTCX Fairchild Semiconductor, 74LVX244MTCX Datasheet

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74LVX244MTCX

Manufacturer Part Number
74LVX244MTCX
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVXr
Datasheet

Specifications of 74LVX244MTCX

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
4mA, 4mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
LVX
Number Of Channels Per Chip
8
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Maximum Power Dissipation
180 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8 / 8
Output Type
3-State
Propagation Delay Time
14.9 ns at 2.7 V, 10.6 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVX244MTCXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVX244MTCX
Manufacturer:
ST
0
Part Number:
74LVX244MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
74LVX244M
74LVX244SJ
74LVX244MTC
74LVX244
Low Voltage Octal Buffer/Line Driver with
3-STATE Outputs
General Description
The LVX244 is an octal non-inverting buffer and line driver
designed to be employed as a memory address driver,
clock driver and bus oriented transmitter or receiver which
provides improved PC board density. The inputs tolerate up
to 7V allowing interface of 5V systems to 3V systems.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagram
Order Number
Package Number
MTC20
IEEE/IEC
M20B
M20D
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
DS011552
Features
Pin Descriptions
Truth Tables
H
X
OE
I
O
Input voltage translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
0
Immaterial
HIGH Voltage Level
–I
0
Pin Names
–O
1
7
OE
OE
, OE
Package Description
H
H
L
L
L
L
7
1
2
2
Inputs
Inputs
I
H
I
H
3-STATE Output Enable Inputs
Inputs
Outputs
L
X
L
X
n
n
L
Z
LOW Voltage Level
High Impedance
February 1993
Revised April 2005
(Pins 12, 14, 16, 18)
Description
(Pins 3, 5, 7, 9)
Outputs
Outputs
www.fairchildsemi.com
H
H
L
Z
L
Z

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74LVX244MTCX Summary of contents

Page 1

... Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol IEEE/IEC Connection Diagram © 2005 Fairchild Semiconductor Corporation Features Input voltage translation from Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and ...

Page 2

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. Input Voltage ( Output Diode Current ( 0. 0.5V ...

Page 3

AC Electrical Characteristics V CC Symbol Parameter (V) t Propagation Delay 2.7 PLH t Time PHL r 3.3 0.3 t 3-STATE Output 2.7 PZL t Enable Time PZH r 3.3 0.3 t 3-STATE Output 2.7 PLZ r t Disable Time ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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