TLE 7368E Infineon Technologies, TLE 7368E Datasheet - Page 31

• Manufacturer Part Number: TLE 7368E
• Manufacturer: Infineon Technologies

Specifications of TLE 7368E

• Packages: PG-DSO-36
• Comment: 3 linear post regulators (5V, 3.3/2.6V, 1.5V),selectable StandBy-Vreg (1.0/2.6V) and 2 voltage trackers (5V)
• Vq (max): 5.0 V, 3.3/2.6 V, 1.5 V, 1.0/2.6 V
• Iq (max): 2,500.0 mA
• Iq (typ): 120.0 µA
• Output: Linear (Buck Preregulator)

5.9
The monitoring block within the TLE7368 detects an undervoltage at the stand-by regulator output and is able to
distinguish between two different undervoltage situations. When the stand-by output gets back into regulation after
an undervoltage event, the timing on the MON_STBY output signal indicates the kind of undervoltage scenario
which has happened before. The behavior of the monitoring block is also described in
below.
In case of an undervoltage at the stand-by regulator with the 5 V regulator LDO1 in regulation (which means that
RO_1 = HIGH) the monitoring circuit has basically a power fail functionality which means that the MON_STBY
output will be LOW just as long as the undervoltage at the stand-by output occurs. As soon as Q_STBY is coming
back into regulation MON_STBY turns high again.
When the 5 V regulator is out of regulation (RO_1 = LOW), e.g. in case of EN_uC = EN_IGN = LOW, the
MON_STBY will turn LOW again if an undervoltage event happens at Q_STBY. The difference to the scenario
described above is now that when Q_STBY gets back into regulation the toggling of the MON_STBY output to
HIGH is coupled with the 5 V Reset line, RO_1, turning HIGH. In detail, the MON_STBY line turns high delayed
by
Figure 6
Data Sheet
t
MON_STBY
Monitor timing
V
MON = Low
= no delay
Q_STBY
RO_1 = High
Monitoring Circuit
after the Reset line RO_1 had gone high.
Stand by Monitor State Diagram
< V
and
MON, Q_STBY, de
*)
V
Q_STBY
RO_1 = High
> V
and
MON, Q_STBY, in
*)
**)
V
power fail functionionality
Q_STBY
power on reset functionality
Monitor timing
MON = High
= don’t care
RO_1 = Low
< V
and
MON, Q_STBY, de
V
Q_STBY
31
RO_1 = High
> V
and
MON, Q_STBY, in
V
Q_STBY
RO_1 = Low
Monitor timing
MON = Low
< V
= delay
and
MON, Q_STBY, de
Detailed Internal Circuits Description
**)
Figure 6
V
Rev. 2.1, 2010-11-22
Q_STBY
RO_1 = Low
> V
and
and
MON, Q_STBY, in
TLE7368
Figure 7