TLE 7368E Infineon Technologies, TLE 7368E Datasheet - Page 34

• Manufacturer Part Number: TLE 7368E
• Manufacturer: Infineon Technologies

Specifications of TLE 7368E

• Packages: PG-DSO-36
• Comment: 3 linear post regulators (5V, 3.3/2.6V, 1.5V),selectable StandBy-Vreg (1.0/2.6V) and 2 voltage trackers (5V)
• Vq (max): 5.0 V, 3.3/2.6 V, 1.5 V, 1.0/2.6 V
• Iq (max): 2,500.0 mA
• Iq (typ): 120.0 µA
• Output: Linear (Buck Preregulator)

input WDI. A valid trigger signal is a falling edge from
the "Open Window" the watchdog immediately terminates the "Open Window" and enters the "Closed Window"
state. The "Closed Window" has a fixed duration
applied during the "Closed Window. After the "Closed Window" time
"Open Window" state. Within the "Open Window", a valid trigger signal must be applied to the watchdog input WDI.
In normal operation, the watchdog continues to cycle between the "Open Window" and "Closed Window" state. If
reset signal RO_2 is asserted and transitions to a low state, then the watchdog needs to be reinitialized as
described in the Initialization section. The watchdog output WDO stays high as long as the watchdog input WDI
is triggered correctly.
Valid Trigger Signal:
Please refer to
Watchdog input WDI is periodically sampled with a period of
V
followed two low samples are required for a valid trigger signal. For example, if the first three samples (two HGH
one LOW) of the trigger pulse at pin WDI are inside the closed window and only the fourth sample (the second
LOW sample) is taken in the open window then the watchdog output WDO will remain High.
Invalid Triggering:
Please refer to
No trigger signal detected during the "Open Window" or a trigger signal detected during the "Closed Window", is
considered invalid triggering. Watchdog output WDO switches to low for a duration of
valid trigger during the "Open Window" or immediately if a trigger signal is detected during the "Closed Window".
Fault Operation:
If a capacitor failure on the watchdog timing pin RT causes a short circuit to GND, then the internal oscillator stops
operating. Without oscillator operation there is no time reference for the watchdog so it does not know when the
"Closed Window" period has ended. Thus, every second trigger signal on watchdog input WDI generates a
watchdog failure causing WDO to switch from high to low. An open circuit at pin RT also causes WDO to switch
from high to low.
Figure 9
Data Sheet
WDI,high
to
V
WDI,low
Window Watchdog Input Signal Validation
Figure
Figure 8
. To improve immunity against noise or glitches on the WDI input, at least two high samples
9.
and
Figure
9.
t
WD,W
V
WDI,high
34
. During normal operation a trigger signal should not be
to
V
T
WD
WDI,low
. A valid trigger signal is a falling edge from
t
. After receiving a valid trigger signal within
WD,W
Detailed Internal Circuits Description
an the watchdog returns back to the
t
WD,W
Rev. 2.1, 2010-11-22
immediately after no
TLE7368