SAK-C167CS-4R40M CA+ Infineon Technologies, SAK-C167CS-4R40M CA+ Datasheet - Page 31

• Manufacturer Part Number: SAK-C167CS-4R40M CA+
• Manufacturer: Infineon Technologies

Specifications of SAK-C167CS-4R40M CA+

• Packages: PG-MQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 32.0 KByte

Figure 6
With its maximum resolution of 8 TCL, the GPT2 module provides precise event control
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock via a programmable prescaler or with external signals. The count direction (up/
down) for each timer is programmable by software or may additionally be altered
dynamically by an external signal on a port pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of timer T6, which changes its state on
each timer overflow/underflow.
The state of this latch may be used to clock timer T5, and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can additionally be used to clock the
CAPCOM timers T0 or T1, and to cause a reload from the CAPREL register. The
CAPREL register may capture the contents of timer T5 based on an external signal
transition on the corresponding port pin (CAPIN), and timer T5 may optionally be cleared
Data Sheet
n = 3 … 10
T2EUD
T3EUD
T4EUD
T2IN
T3IN
T4IN
f
f
f
CPU
CPU
CPU
Block Diagram of GPT1
2
2
2
n
n
n
: 1
: 1
: 1
Control
Control
Control
Mode
Mode
Mode
T2
T3
T4
Capture
Capture
Reload
Reload
U/D
GPT1 Timer T2
GPT1 Timer T3
GPT1 Timer T4
27
U/D
U/D
Toggle FF
T3OTL
C167CS-4R
Interrupt
Request
(T2IR)
Interrupt
Request
(T3IR)
Interrupt
Request
(T4IR)
MCT04825
V2.2, 2001-08
C167CS-L
T3OUT