74LVT245D,118 NXP Semiconductors, 74LVT245D,118 Datasheet - Page 3

• Manufacturer Part Number: 74LVT245D,118
• Description: IC TRANSCVR TRI-ST 8BIT 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74LVTr

Specifications of 74LVT245D,118

• Logic Type: Transceiver, Non-Inverting
• Package / Case: 20-SOIC (7.5mm Width)
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: LVT
• Number Of Channels Per Chip: 8
• Input Level: LVTTL
• Output Level: LVTTL
• Output Type: 3-State
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Propagation Delay Time: 2.4 ns
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 85 C
• Function: Bus Transceiver
• Input Bias Current (max): 12000 uA
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Polarity: Non-Inverting
• Number Of Circuits: 1
• Operating Supply Voltage (typ): 3.3V
• Number Of Elements: 1
• Number Of Channels: 8
• Input Logic Level: LVTTL
• Output Logic Level: LVTTL
• Package Type: SO
• Logical Function: Bus Transceiver
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Quiescent Current (typ): 3mA
• Technology: BiCMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVT245D-T; 74LVT245D-T; 935155210118

NXP Semiconductors
5. Pinning information
Table 2.
74LVT245_3
Product data sheet
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
V
Fig 3.
CC
Pin configuration for SO20 and (T)SSOP20
Pin description
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
5.1 Pinning
1
2
3
4
5
6
7
8
9
5.2 Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
74LVT245
001aah721
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
Rev. 03 — 8 May 2008
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
Fig 4.
3.3 V octal transceiver with direction pin (3-state)
(1) The die substrate is attached to this pad using a
conductive die attach material. It can not be used as a
supply pin or input.
Pin configuration for DHVQFN20
index area
terminal 1
A0
A1
A2
A3
A4
A5
A6
A7
Transparent top view
2
3
4
5
6
7
8
9
74LVT245
GND
(1)
19
18
17
16
15
14
13
12
74LVT245
001aah722
© NXP B.V. 2008. All rights reserved.
OE
B0
B1
B2
B3
B4
B5
B6
3 of 15