STEL-1209/CE Intel, STEL-1209/CE Datasheet - Page 11

• Manufacturer Part Number: STEL-1209/CE
• Description: BPSK/QPSK/16 QAM Burst Modulator Assembly
• Manufacturer: Intel

MAIN PARAMETERS SCREEN
SAMPLING RATE
Master Clock Frequency
The Master Clock Frequency window must be set (in
Hz) to match the actual clock rate. The clock frequency
to specify is either the external oscillator source
connected to the J2 connector, or the on-board 102.4
MHz crystal oscillator (selected by JP4). The software
enforced limit to this field is set (above the rated
performance of the hardware) at 200 MHz.
following relationship must be formed between the
master clock, interpolation ratio, and symbol rate:
Master Clock = 4 * Interpolation Ratio * Symbol Rate
Interpolation Ratio
The interpolation ratio determines the sampling rate of
the FIR filter and the symbol rate of the modulator. The
symbol rate will be equal to the Master Clock rate
divided by four times the interpolation ratio.
The
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Symbol Rate
For QPSK modulation, the symbol rate is half of the
data rate. For 16QAM modulation, the symbol rate is
one forth the data rate. When choosing a symbol rate,
be sure that the requirement is met with Master Clock
and Interpolation Ratio as mentioned above in the
Master Clock Frequency description. Symbol rate is a
calculated field.
BURST PARAMETERS
Note that the sum of the lengths of the preamble,
packet size, and guard time must not exceed 16384.
Preamble Size
STEL-1209's preamble size is programmable between 0
and 255 symbols.
Packet Size
Minimum packet length is one and maximum packet
length is given by Packet Length(max) = 16383 - Guard
Time - Preamble. Default value for packet size is 512.
STEL-1209