STEL-1209/CE Intel, STEL-1209/CE Datasheet - Page 16

• Manufacturer Part Number: STEL-1209/CE
• Description: BPSK/QPSK/16 QAM Burst Modulator Assembly
• Manufacturer: Intel

Interpolation Filter Gain
This controls the gain through the interpolator. This
gain needs to be set according to the interpolation ratio
factor and the number of interpolation stages selected.
Care must be taken in setting this parameter. For best
spur performance and maximum output power, the
filter gain should be maximized. However, if it is too
large, the digital data will overflow internally (in the
STEL-1109) and the output will be severely distorted.
The gain factor can be set from 0 to 15, the actual gain
doubling each time the factor is incremented by one.
BER TEST SETUP
STEL-1209
Reset
S1
J1
P2
STel-1209
Modulator
Burst
JP1
J6
J5
Com1
5-65 MHz
IF Out
IBM PC Compatible/Window 95
TXData
EXT_TXClk In
AGND
DGND
+5V
STEL-1209
-5V
Software
Interface
Attenuator
Power Supply
(~40 dB)
BER Tester
(Fireberd)
8 dBmV ± 5 dBmV
STEL-9244
Software
Interface
16
RXData
+12V
GND
+5V
RXClk
Interpolation Stages
The number of interpolation stages used in the STEL-
1109 can be varied from 1 to 3 by means of this field.
Three stages should be used whenever possible, to
minimize spur levels. However, it may be necessary to
use fewer than three stages when the data rate is very
slow relative to the master clock frequency. Otherwise,
the interpolator gain will be too high and FIR filter
coefficients will have to be scaled down to compensate.
This will result in poor filter characteristics due to
coefficient quantization.
Com2
J1
J3-31
J3
Demodulator
STel-9244
Burst
J3-24
4.7k
J3-6
J3-11
6.2k
WCP 51966.c-4/25/97
100
Reset
+5V