ATA6020N ATMEL Corporation, ATA6020N Datasheet - Page 48

• Manufacturer Part Number: ATA6020N
• Description: Low-current Microcontroller For Watchdog Function
• Manufacturer: ATMEL Corporation

5.2.7.8
5.2.7.9
48
ATA6020N
SSI Interrupt
Modulation
Acknowledge
Figure 5-30. MCL Bus Protocol 2
The SSI interrupt INT3 can be generated either by an SSI buffer register status (i.e., transmit
buffer empty or receive buffer full) at the end of an SSI data telegram or on the falling edge of the
SC/SD pins on Port 4 (see P4CR). SSI interrupt selection is performed by the Interrupt Function
control bit (IFN). The SSI interrupt is usually used to synchronize the software control of the SSI
and inform the controller of the present SSI status. Port 4 interrupts can be used together with
the SSI or, if the SSI itself is not required, as additional external interrupt sources. In either case
this interrupt is capable of waking the controller out of sleep mode.
To enable and select the SSI relevant interrupts use the SSI interrupt mask (SIM) and the Inter-
rupt Function (IFN) while Port 4 interrupts are enabled by setting appropriate control bits in
P4CR register.
If the shift register is used together with Timer 2 for modulation purposes, the 8-bit synchronous
mode must be used. In this case, the unused Port 4 pins can be used as conventional bi-direc-
tional ports.
The modulation stage, if enabled, operates as soon as the SSI is activated (SIR = 0) and ceases
when deactivated (SIR = 1).
Due to the byte-orientated data control, the SSI (when running normally) generates serial bit-
streams which are submultiples of 8 bits. However, an SSI output masking (OMSK) function per-
mits, however, the generation of bit-streams of any length. The OMSK signal is derived indirectly
from the 4-bit prescaler of the Timer 2 and masks out a programmable number of unrequired
trailing data bits during the shifting out of the final data word in the bit stream. The number of
non-masked data bits is defined by the value pre-programmed in the prescaler compare register.
To use output masking, the modulator stop mode bit (MSM) must be set to “0” before program-
ming the final data word into the SSI transmit buffer. This in turn, enables shift clocks to the
prescaler when this final word is shifted out. On reaching the compare value, the prescaler trig-
gers the OMSK signal and all following data bits are blanked.
SC
SD
Start
All address and data words are serially transmitted to and
from the device in eight-bit words. The receiving device
returns a zero on the data line during the ninth clock cycle to
acknowledge word receipt.
1st Bit
1
n
8th Bit
8
ACK
9
Stop
4708D–4BMCU–09/05