WM8741 Wolfson Microelectronics plc, WM8741 Datasheet - Page 26

• Manufacturer Part Number: WM8741
• Description: 24-bit 192khz Dac With Advanced Digital Filtering
• Manufacturer: Wolfson Microelectronics plc

WM8741
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Figure 20 8FS Mode Right Justified Timing Requirements
In both modes the polarity of LRCLK can be switched using register bit LRP.
8FS MODE SAMPLING RATES
Since the data rate in 8FS mode is much faster than in standard PCM mode, there are restrictions on
the MCLK rate that can be used. Specifically, only 512fs and 768fs modes are permitted restricting
the sample rate to a maximum of 8x48kHz. The master clock should be synchronised with LRCLK,
although the WM8741 is tolerant of phase differences or jitter on this clock.
Unlike in normal PCM mode, the master clock detection circuit does not operate in 8FS mode. The
rate must be manually programmed using the control interface.
Table 12 Typical Relationships Between Master Clock Frequency and Sampling Rate in 8FS
Mode
AUDIO INTERFACE DAISY CHAINING
In daisy chain mode the DOUT pin outputs the audio data received on the DIN pin but delayed by two
times the input word length. When this output is connected to the DIN pin of the next device in the
chain, each WM8741 device will simultaneously sample different channel data in the same LRCLK
period. Daisy chaining is only available in DSP audio interface mode and is limited by a maximum
BCLK frequency of 24.576MHz.
Table 13 Daisy Chaining Audio Data Output Control
The following diagram illustrates timing for a daisy chain with 2 WM8741 devices.
Figure 21 Audio Interface Daisy Chaining Timing
SAMPLING
REGISTER ADDRESS
44.1kHz
32kHz
48kHz
RATE
Mode Control 2
fs
08h
R8
FREQUENCY
LRCLK
352.8
(kHz)
256
384
8fs
BIT
4
LABEL
DOUT
22.5792
16.384
24.576
MASTER CLOCK (MCLK)
512fs
FREQUENCY (MHz)
DEFAULT
0
33.8688
24.576
36.864
768fs
Daisy Chaining Multiple devices –
multichannel off one PCM feed.
0 = No Output
1 = Output on pin 23.
DESCRIPTION
PD, Rev 4.1, August 2009
Production Data
26