ADT7475 Analog Devices, Inc., ADT7475 Datasheet - Page 11

• Manufacturer Part Number: ADT7475
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

It is possible to read a data byte from a data register without
first writing to the address pointer register if the address pointer
register is already at the correct value. However, it is
not possible to write data to a register without writing to the
address pointer register because the first data byte of a write
is always written to the address pointer register.
In addition to supporting the send byte and receive byte pro-
tocols, the ADT7475 also supports the read byte protocol (for
more information, see System Management Bus Specifications
Rev. 2.0, available from Intel).
If several read or write operations must be performed in
succession, the master can send a repeat start condition
instead of a stop condition to begin a new operation.
WRITE OPERATIONS
The SMBus specification defines several protocols for differ-
ent types of read and write operations. The ones used in the
ADT7475 are discussed in this section. The following
abbreviations are used in the diagrams:
S—Start
P—Stop
R—Read
W—Write
A—Acknowledge
A —No acknowledge
The ADT7475 uses the following SMBus write protocols.
Send Byte
In this operation, the master device sends a single command
byte to a slave device as follows:
1.
2.
3.
4.
5.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
SDA
SCL
SDA
SCL
START BY
MASTER
START BY
MASTER
1
0
1
0
1
1
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
0
0
1
FRAME 1
1
FRAME 1
1
1
Figure 16. Reading Data from a Previously Selected Register
Figure 15. Writing to the Address Pointer Register Only
1
1
0
0
R/W
R/W
Rev. B | Page 11 of 68
ACK. BY
ADT7475
ACK. BY
ADT7475
9
9
D7
D7
1
1
6.
For the ADT7475, the send byte protocol is used to write a
register address to RAM for a subsequent single-byte read from
the same address. This operation is shown in Figure 17.
If the master is required to read data from the register immedi-
ately after setting up the address, it can assert a repeat start
condition immediately after the final ACK and carry out a
single-byte read without asserting an intermediate stop
condition.
Write Byte
In this operation, the master device sends a command byte and
one data byte to the slave device as follows:
1.
2.
3.
4.
5.
6.
7.
8.
The byte write operation is shown in Figure 18.
D6
D6
ADDRESS POINTER REGISTER BYTE
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master sends a data byte.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA and the
transaction ends.
The master asserts a stop condition on SDA and the
transaction ends.
D5
D5
Figure 17. Setting a Register Address for a Subsequent Read
DATA BYTE FROM ADT745
S
1
D4
D4
ADDRESS W A
SLAVE
Figure 18. Single-Byte Write to a Register
FRAME 2
S
1
FRAME 2
2
D3
ADDRESS
D3
SLAVE
2
D2
D2
3
W A
REGISTER
ADDRESS
D1
D1
3
4
REGISTER
ADDRESS
D0
D0
NO ACK. BY
4
MASTER
ADT7475
ACK. BY
5
A
9
9
DATA
A
5
6
6
P
STOP BY
MASTER
STOP BY
MASTER
A P
7 8
ADT7475