HM-6508 Intersil Corporation, HM-6508 Datasheet
HM-6508
Related parts for HM-6508
HM-6508 Summary of contents
Page 1
... The data output buffers can be forced to a high impedance state for use in expanded memory arrays. The HM-6508/883 is a fully static RAM and may be main- tained in any state for an indefinite period of time. Data retention supply voltage and supply current are guaranteed over temperature ...
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... ADDRESS A7 REGISTER NOTES: 1. All lines positive logic - active high. 2. Three-state buffers: A high output active. 3. Address latches and gated decoders: Latch on falling edge of E and gate on falling edge of E. HM-6508/883 A 5 GATED ROW MATRIX 32 DECODER GATED COLUMN DECODER ...
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... NOTE measured with the component mounted on an evaluation PC board in free air. JA TABLE 1. HM-6508/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested PARAMETER SYMBOL Output Low Voltage ...
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... TABLE 2. HM-6508/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested (NOTES 1, 2) PARAMETER SYMBOL CONDITIONS Chip Enable (1) TELQV VCC = 4.5 and Access Time 5.5V Address Access (2) TAVQV VCC = 4.5 and Time 5.5V, Note 3 Chip Enable (3) TELQX VCC = 4.5 and Output Disable 5.5V Time Write Enable (4) TWLQZ VCC = 4.5 and Output Disable 5 ...
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... TABLE 3. HM-6508/883 ELECTRICAL PERFORMANCE SPECIFICATIONS PARAMETER SYMBOL Input Capacitance CI VCC = Open 1MHz, All Measurements Referenced to Device Ground Output Capacitance CO VCC = Open 1MHz, All Measurements Referenced to Device Ground NOTE: 1. The parameters listed in Table 3 are controlled via design or process; parameters are characterized upon initial design and after major process and/or design changes ...
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... the HM-6508/883 Read Cycle, the address information is latched into the on-chip registers on the falling edge 0). Minimum address setup and hold time requirements must be met. After the required hold time, the addresses may change state without affecting device operation. During time ( the data output becomes enabled ...
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... W line may remain low until all desired locations have been written. When this method is used, data setup and hold Test Load Circuit DUT (NOTE 1) CL NOTE: 1. Test head capacitance includes stray and jig capacitance. HM-6508/883 TRUTH TABLE INPUTS OUTPUTS ...
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... Burn-In Circuit NOTES: 1. All resistors 47k 5 100kHz 10 F12 = F11 4. VCC = 5.5V 0.5V. 5. VIH = 4.5V 10%. 6. VIL = -0.2V to +0.4V 0.01 F Min. HM-6508/883 HM6508/883 CERDIP VCC VCC F12 ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HM-6508/883 WORST CASE CURRENT DENSITY: 5 1.342 x 10 A/cm LEAD TEMPERATURE (10s soldering): o 300 C HM-6508/883 E VCC GND 6- ...