HMP451S6MMP8C Hynix Semiconductor, HMP451S6MMP8C Datasheet - Page 8

• Manufacturer Part Number: HMP451S6MMP8C
• Description: 200pin Unbuffered Ddr2 Sdram So-dimms Based On 2gb Version
• Manufacturer: Hynix Semiconductor

Rev. 0.1 / May. 2008
Differential Input AC logic Level
1. V
2. V
Notes:
1. V
2. The typical value of V
DIFFERENTIAL AC OUTPUT PARAMETERS
Notes:
1. The typical value of V
LDQS, UDQS and UDQS.
(such as CK, DQS, LDQS or UDQS) level and V
The minimum value is equal to V
(such as CK, DQS, LDQS or UDQS) and V
The minimum value is equal to V
Symbol
track variations in V
Symbol
V
track variations in V
V
V
IN
ID
ID
OX
ID
IX
(DC) specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS,
(DC) specifies the input differential voltage |V
(AC) specifies the input differential voltage |V
(ac)
(ac)
(ac)
ac differential input voltage
ac differential cross point voltage
ac differential cross point voltage
DDQ
DDQ
IX
OX
(AC) is expected to be about 0.5 * V
(AC) is expected to be about 0.5 * V
. V
. V
Parameter
Parameter
V
V
IX
OX
CP
TR
(AC) indicates the voltage at whitch differential input signals must cross.
(AC) indicates the voltage at whitch differential output signals must cross.
IH
IH
(AC) - V
(DC) - V
CP
IL
IL
(AC).
(DC).
< Differential signal levels >
1200pin Unbuffered DDR2 SDRAM SO-DIMMs
is the complementary input signal (such as CK, DQS, LDQS or UDQS).
CP
TR
TR
-V
-V
is the complementary input (such as CK, DQS, LDQS or UDQS) level.
CP
CP
0.5 * V
0.5 * V
| required for switching, where V
| required for switching, where V
V
SSQ
V
DDQ
DDQ
Min.
ID
DDQ
Min.
DDQ
0.5
of the transmitting device and V
of the transmitting device and V
- 0.175
- 0.125
0.5 * V
0.5 * V
V
V
IX or
DDQ
Max.
DDQ
Max.
DDQ
Crossing point
+ 0.6
V
TR
+ 0.175
TR
+ 0.125
OX
is the true input signal
is the true input
IX
OX
(AC) is expected to
(AC) is expected to
Units
Units
V
V
V
Note
Note
1
2
1
8