IR3081 International Rectifier Corp., IR3081 Datasheet - Page 16

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IR3081

Manufacturer Part Number
IR3081
Description
Xphasetm Vr 10 Control Ic
Manufacturer
International Rectifier Corp.
Datasheet

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Power Good Output
The PWRGD pin is an open-collector output and should be pulled up to a voltage source through a resistor. During
soft start, the PWRGD remains low until the output voltage is in regulation and SS/DEL is above 3.91V. The
PWRGD pin becomes low if the fault latch is set. A high level at the PWRGD pin indicates that the converter is in
operation and has no fault, but does not ensure the output voltage is within the specification. Output voltage
regulation within the design limits can logically be assured however, assuming no component failure in the system.
Load Current Indicator Output
The VDRP pin voltage represents the average current of the converter plus the DAC voltage. The load current
information can be retrieved by a differential amplifier which subtracts the VDAC voltage from the VDRP voltage.
System Reference Voltage (VBIAS)
The IR3081 supplies a 6.8V/5mA precision reference voltage from the VBIAS pin. The oscillator ramp amplitude
tracks the VBIAS voltage, which should be used to program the Phase IC trip points to minimize phase delay errors.
Enable Input
Pulling the ENABLE pin below 0.6V sets the Fault Latch.
VCC
(12V)
ENABLE
SS/DEL
VOUT
PWRGD
IOUT
Page 16 of 39
(ENABLE GATES
FAULT MODE)
3.91V
1.3V
START-UP
(VOUT CHANGES DUE TO LOAD
AND VID CHANGES)
NORMAL OPERATION
OCP THRESHOLD
Figure 10. Operating Waveforms
OCP
DELAY
HICCUP OVER-CURRENT
PROTECTION
RE-START
AFTER
OCP
10/01
IR3081
/04
POWER-DOWN
(VCC GATES
FAULT MODE)
8.9V
UVLO

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