MB3874 Fujitsu Media Devices, MB3874 Datasheet - Page 16

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MB3874

Manufacturer Part Number
MB3874
Description
DC/DC Converter IC for Parallel Charging
Manufacturer
Fujitsu Media Devices
Datasheet
16
MB3874/MB3876
(7) PWM comparator block (PWM Comp.)
(8)
(9)
(10) Bias voltage block (VH)
2. Protection Functions
3. Soft Start Function
4. Additional Functions
(RS2) using the +INC2 terminal (pin 13) and INC2 terminal (pin 12) and output the signal amplified by 25 times
to the error amplifier (Error Amp. 3) at the next stage.
The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error
amplifiers (Error Amp. 1 to Error Amp. 5) depending on their output voltage.
The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the
error amplifier output voltage and turns on the external output transistor during the interval in which the triangular
wave voltage is lower than the error amplifier output voltage.
The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET.
The output “L” level sets the output amplitude to 5 V (typical) using the voltage generated by the bias voltage
block (VH).
This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external
transistor in a wide range of input voltages.
Setting the CTL terminal (pin 6) low places the IC in the standby mode. (The supply current is 10 A at maximum
in the standby mode.)
The bias voltage circuit outputs Vcc 5 V (typical) as the minimum potential of the output circuit. In the standby
mode, this circuit outputs the potential equal to Vcc.
Low-Vcc malfunction preventive circuit (UVLO)
The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF), which
occurs when the power supply is turned on, may cause malfunctions in the control IC, resulting in breakdown
or degradation of the system. To prevent such malfunction, the low-Vcc malfunction preventive circuit detects
a supply voltage or internal reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The
system restores voltage supply when the supply voltage or internal reference voltage reaches the threshold
voltage of the low-Vcc malfunction preventive circuit.
Soft start block (SOFT)
Connecting a capacitor to the CS terminal (pin 22) prevents surge currents when the IC is turned on. Using an
error amplifier for soft start detection makes the soft start time constant, independent of the output load of the
DC/DC converter.
The dynamically controlled charging detection block (MASK Comp.) usually output the “H” level signal. The
OUTM signal becomes low (“L” level) when the output voltage of the error amplifier (Error Amp. 1) that detects
the input voltage (Vcc) becomes lower than the crest value (2.5 V) of the triangular waveform generator (OSC).
The OUTM signal return high (“H” level) when the input voltage reaches 2.8 V or more.
Dynamically controlled charging detection block (MASK Comp.)
Output block (OUT)
Control block (CTL)

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