STE2002_06 ST Microelectronics, Inc., STE2002_06 Datasheet - Page 29

• Manufacturer Part Number: STE2002_06
• Description: 81 x 128 Single-chip LCD Controller/driver
• Manufacturer: ST Microelectronics, Inc.

STE2002
5.3
Table 10.
H=0 or H=1
Function Set
Read Status Byte
Write Data
Instruction
Figure 34. Reading sequence
Parallel interface
The STE2002 parallel Interface is a bidirectional link between the display driver and the
application supervisor. It consists of eleven lines: eight data lines (from DB7 to DB0) and
three control lines. The control lines are: enable (E) for data latch, PD/C for mode selection
and R/W for reading or writing.
The data lines and the control line values are internally latched on E rising edge (fig. 50).
When the parallel interface is selected, if R/W line is set to “one”, D0-D7 lines are configured
as output drivers (low impedence) and it is possible to read the driver I
STE2001-like instruction set
D/C
0
0
0
1
R/W
0
0
1
0
PD
B7
D7
0
0
B6
D6
A1
0
0
note: 1) these data are not read by the display Diver
B5
D5
A2
2) SDIN and SOUT can be short circuited if the processor can configure
0
1
serial output buffers in high impedence during data read .
Read the I2C Address or Status Byte On SOUT
SOUT Buffer becomes active (Low Impedence)
SOUT Buffer Configured in High Impedence
MX
D4
B4
D
0
Write a "00000000" Instruction
END OF READING SEQUENCE
Source 8 pulses on SCLK and
READING SEQUENCE
MY
B3
D3
E
0
MX
PD
B2
D2
0
MY
B1
D1
V
0
1
LR0078
H[0]
DO
B0
D0
0
2
Read I
(with Serial Interface
only)
Power Down
Management; Entry
Mode;
(I
Writes data to RAM
C address (Fig. 51)
2
C interface only)
Description
Bus interfaces
2
C Address
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