MAX3799 Maxim Integrated Products, MAX3799 Datasheet - Page 23

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MAX3799

Manufacturer Part Number
MAX3799
Description
SFP+ Multirate Limiting Amplifier And VCSEL Driver
Manufacturer
Maxim Integrated Products
Datasheet

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Bit 0: LOS. Copy of the LOS output circuitry. This is a sticky bit, which means that it is cleared on a read. The first
0-to-1 transition gets latched until the bit is read by the master or POR occurs.
Bits 7 to 0: SET_CML[7:0]. The SET_CML register is an 8-bit register that can be set up to R15, corresponding to
an output up to 1000mV
DAC code graph.
Bits 5 to 0: SET_LOS[5:0]. The SET_LOS register is a 6-bit register used to program the LOS threshold. See the
Typical Operating Characteristics section for a typical LOS threshold voltage vs. DAC code graph.
Bit #
Name
Default Value
Bit #
Name
Default Value
Bit #
Name
Default Value
1Gbps to 14Gbps, SFP+ Multirate Limiting
SET_CML[7]
(MSB)
______________________________________________________________________________________
7
0
7
X
X
7
X
X
P-P
SET_CML[6] SET_CML[5] SET_CML[4] SET_CML[3] SET_CML[2] SET_CML[1]
. See the Typical Operating Characteristics section for a typical CML output voltage vs.
6
1
X
X
6
X
X
6
SET_LOS[5]
(MSB)
X
X
5
0
5
0
5
SET_LOS[4]
Amplifier and VCSEL Driver
X
X
4
1
4
4
0
SET_LOS[3]
LOS Threshold Level Setting Register (SET_LOS)
X
X
3
0
3
3
1
Output CML Level Setting Register (SET_CML)
SET_LOS[2]
2
0
X
X
2
1
2
Receiver Status Register (RXSTAT)
SET_LOS[1]
1
1
X
X
1
0
1
SET_CML[0]
SET_LOS[0]
(STICKY)
(LSB)
(LSB)
LOS
0
1
X
0
0
0
ADDRESS
ADDRESS
ADDRESS
H0x03
H0x02
H0x04
23

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