WM8978 Wolfson Microelectronics Ltd., WM8978 Datasheet - Page 40

• Manufacturer Part Number: WM8978
• Description: The WM8978 is a low power, high quality stereo codec designed for portable applications such as Digital still camera or Digital Camcorde
• Manufacturer: Wolfson Microelectronics Ltd.

WM8978
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The hold, decay and attack times given in Table 20 are constant across sample rates so long as the
SR bits are set correctly. E.g. when sampling at 48kHz the sample rates stated in Table 20 will only
be correct if the SR bits are set to 000 (48kHz). If the actual sample rate was only 44.1kHz then the
hold, decay and attack times would be scaled down by 44.1/48.
R32
ALC Control
1
R33
ALC Control
2
REGISTER
ADDRESS
8:7
5:3
2:0
7:4
3:0
BIT
ALCSEL
ALCMAXGAIN
[2:0]
ALCMINGAIN
[2:0]
ALCHLD
[3:0]
ALCLVL
[3:0]
LABEL
00
111
(+35.25dB)
000 (-12dB)
0000
(0ms)
1011
(-12dB)
DEFAULT
ALC function select
00=ALC disabled
01=Right channel ALC enabled
10=Left channel ALC enabled
11=Both channels ALC enabled
Set Maximum Gain of PGA
111=+35.25dB
110=+29.25dB
101=+23.25dB
100=+17.25dB
011=+11.25dB
010=+5.25dB
001=-0.75dB
000=-6.75dB
Set minimum gain of PGA
000=-12dB
001=-6dB
010=0dB
011=+6dB
100=+12dB
101=+18dB
110=+24dB
111=+30dB
ALC hold time before gain is increased.
0000 = 0ms
0001 = 2.67ms
0010 = 5.33ms
… (time doubles with every step)
1111 = 43.691s
ALC target – sets signal level at ADC
input
1111 : -1.5dBFS
1110 : -1.5dBFS
1101 : -3dBFS
1100 : -4.5dBFS
...... (-1.5dB steps)
0001 : -21dBFS
0000 : -22.5dBFS
PTD Rev 2.6 November 2005
DESCRIPTION
Preliminary Technical Data
40