ADS7808 Burr-Brown Corporation, ADS7808 Datasheet - Page 6

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ADS7808

Manufacturer Part Number
ADS7808
Description
12-Bit 10ms Serial CMOS Sampling ANALOG-to-DIGITAL CONVERTER
Manufacturer
Burr-Brown Corporation
Datasheet

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NOTE: (1) See Figure 3b for constraints on previous data valid during conversion.
Table III. Control Truth Table.
Table IV. Output Codes and Ideal Input Voltages.
Incorrect Conversions
DESCRIPTION
Full-Scale Range
Least Significant Bit (LSB)
+Full Scale (FS – 1LSB)
Midscale
One LSB Below Midscale
–Full Scale
Initiate Conversion and
Output Data Using External
Clock
Power Down
Selecting Output Format
SPECIFIC FUNCTION
Initiate Conversion and
Output Data Using
Internal Clock
®
ADS7808
9.99512V 4.99756V 3.33171V
–4.88mV
4.88mV
–10V
1>0
1>0
1>0
1>0
CS
0V
0
0
0
0
x
x
x
x
10
–2.44mV
2.44mV
R/C
1>0
1>0
0>1
–5V
0
0
1
1
0
x
x
x
x
0V
5
–3.333333V
BUSY EXT/INT DATACLK PWRD
–1.63mV
0>1
1.63mV
ANALOG INPUT
1
1
1
1
1
0
0
x
x
x
x
3.33V
0V
0
0
1
1
1
1
1
x
x
x
x
x
4.99878V 9.99756V
2.49878V 4.99756V
0V to 5V 0V to 10V
1.22mV
2.5V
0V
Output
Output
Input
Input
Input
Input
Input
x
x
x
x
x
2.44mV
6
5V
0V
0
0
0
0
x
0
0
0
0
1
x
x
3.99902V
1.99902V
0V to 4V
0.98mV
0V
SB/BTC
2V
x
x
x
x
x
x
x
0
1
x
x
x
0111 1111 1111
0000 0000 0000
1111 1111 1111
1000 0000 0000
BINARY CODE
OPERATION
Initiates conversion “n”. Data from conversion “n–1”
clocked out on DATA synchronized to 12 clock
pulses output on DATACLK.
Initiates conversion “n”. Data from conversion “n–1”
clocked out on DATA synchronized to 12 clock
pulses output on DATACLK.
Initiates conversion “n”.
Initiates conversion “n”.
Outputs a pulse on SYNC followed by data from
conversion “n” clocked out synchronized to external
DATACLK.
Outputs a pulse on SYNC followed by data from
conversion “n–1” clocked out synchronized to
external DATACLK.
Outputs a pulse on SYNC followed by data from
conversion “n–1” clocked out synchronized to
external DATACLK .
CS or R/C must be HIGH or a new conversion will
be initiated without time for acquisition.
Analog circuitry powered. Conversion can proceed.
Analog circuitry disabled. Data from previous
conversion maintained in output registers.
Serial data is output in Binary Two’s Complement
format.
Serial data is output in Straight Binary format.
BINARY TWO’S
COMPLEMENT
(SB/BTC LOW)
HEX
DIGITAL OUTPUT
CODE
FFF
7FF
000
800
(1)
(1)
Conversion “n” in process.
Conversion “n” in process.
1111 1111 1111
1000 0000 0000
0111 1111 1111
0000 0000 0000
BINARY CODE CODE
STRAIGHT BINARY
(SB/BTC HIGH)
HEX
7FF
800
000
FFF

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