SC486 Semtech Corporation, SC486 Datasheet - Page 15

• Manufacturer Part Number: SC486
• Description: Complete DDR1/2/3 Memory Power Supply
• Manufacturer: Semtech Corporation

www.DataSheet4U.com
Design Procedure - VDDQ Controller
Prior to designing an output and making component
selections, it is necessary to determine the input voltage
range and the output voltage specifications. For purposes
of demonstrating the procedure an 8A VDDQ output
being used to power VTT at +/-2A for a total IDDQ of
10A will be designed.
The maximum input voltage (V
the highest AC adaptor voltage. The minimum input
voltage (V
voltage after accounting for voltage drops due to
connectors, fuses and battery selector switches. For the
purposes of this design example we will use a V
of 9V to 19.2V.
Four parameters are needed for the output:
1) nominal output voltage, V
2) static (or DC) tolerance, TOL
this design )
3) transient tolerance, TOL
use +/-100mV for this design).
4) maximum output current, I
10A)
Switching frequency determines the trade-off between
size and efficiency. Increased frequency increases the
switching losses in the MOSFETs, since losses are a
function of VIN
budget for MOSFET switches usually dictates where the
design ends up. The default R
suggested as a starting point, but it is not set in stone.
The first thing to do is to calculate the on-time, t
V
V
and
From these values of t
switching frequency as follows:
POWER MANAGEMENT
t
t
f
ON
ON
SW
BAT(MIN)
OUT
2006 Semtech Corp.
_
_
_
VBAT
VBAT
VBAT
and R
(
(
MAX
MIN
and V
(
MIN
)
)
tON
BAT(MIN)
)
3
3
.
BAT(MAX)
3 .
3 .
2
V
. Knowing the maximum input voltage and
) is determined by the lowest battery
BAT
10
10
(
, since this depends only upon V
MIN
12
12
)
V
R
R
ON
OUT
t
tON
tON
ON
we can calculate the nominal
TR
_
VBAT
and size of transient (we will
OUT
37
37
OUT
ST
BAT(MAX)
(for DDR2 this is 1.8V)
(
MIN
10
10
tON
(we will use +/-4% for
(we are designing for
)
3
3
Hz
value of 715k
) is determined by
V
V
BAT
BAT
V
V
OUT
OUT
(
(
MAX
MIN
)
)
50
50
BAT
range
ON
10
10
, at
BAT
9
9
is
s
s
,
15
and
t
V
used to charge an internal 3.3pF capacitor to V
equations above reflect this along with any internal
components or delays that influence t
VDDQ example we select R
t
f
Now that we know t
for the inductor. To do this we select an acceptable
inductor ripple current. The calculations below assume
50% of I
and
For our DDR2 VDDQ example:
L
We will select an inductor value of 1.5µH to reduce the
ripple current, which can be calculated as follows:
and
I
I
L
L
f
ON
ON_VBAT(MIN)
SW_VBAT(MIN)
RIPPLE
RIPPLE
SW
VBAT(MIN)
BAT
VBAT
VBAT
is generated by a one-shot comparator that samples
_
via R
VBAT
(
(
_
_
MIN
MAX
VBAT
VBAT
(
)
= 0.8µH and L
MAX
OUT
)
tON
(
(
= 546ns and t
= 366kHz and f
MIN
MAX
)
, converting this to a current. This current is
which will give us a starting place.
V
V
)
BAT
)
BAT
V
(
MIN
(
BAT
V
MAX
V
BAT
BAT
)
(
MAX
)
ON
(
MIN
(
MAX
V
)
VBAT(MAX)
V
we can calculate suitable values
OUT
)
V
OUT
)
OUT
t
ON_VBAT(MAX)
ON
V
SW_VBAT(MAX)
V
tON
OUT
_
t
OUT
VBAT
ON
= 1.0µH
0
t
= 715k :
ON
5 .
0
_
(
5 .
VBAT
MAX
_
t
VBAT
ON
t
= 283ns
I
ON
OUT
)
(
I
= 332kHz
_
MIN
OUT
(
Hz
VBAT
_
MAX
L
VBAT
ON
)
L
H
. For our DDR2
)
(
www.semtech.com
MIN
H
(
MAX
SC486
)
A
)
A
P
P
P
OUT
P
. The