nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 151

• Manufacturer Part Number: nRF24LE1
• Manufacturer: Nordic VLSI

nRF24LE1 Preliminary Product Specification
19.3.1
The S0CON register controls the function of Serial Port 0.
Below is an explanation of some of the values used in
Revision 1.1
Address
0x98
a. If smod = 0 baud rate is ckCpu/64, if smod = 1 then baud rate is ckCpu/32.
SMOD (PCON.7)
bd (adcon.7)
Serial port 0 control register – S0CON
Reset
S0REL
value
Value
0x00
Bit Name
7:6
5
4
3
2
1
0
for
for
Figure 64. Equation of baud rate settings for Serial Port 0
sm20 Multiprocessor communication enable
bd
bd
sm0:
ren0 Serial reception enable: 1: Enable Serial Port 0.
tb80 Transmitter bit 8. This bit is used while transmitting data through
rb80 Received bit 8. This bit is used while receiving data through Serial
sm1
baud
baud
ri0
Serial Port 0 baud rate select flag
The contents of S0REL registers (s0relh, s0rell) see
The MSB of ADCON register see
ti0
(
(
wdcon
wdcon
Serial Port 0 mode select
0 0: Mode 0 – Shift register at baud rate ckCpu / 12
0 1: Mode 1 – 8-bit UART.
1 0: Mode 2 – 9-bit UART at baud rate ckCpu /32 or ckCpu/64
1 1: Mode 3 – 9 bit UART.
Serial Port 0 in Modes 2 and 3. The state of this bit corresponds with
the state of the 9th transmitted bit (for example, parity check or multi-
processor communication). It is controlled by software.
Port 0 in Modes 2 and 3. It reflects the state of the 9th received bit.
Transmit interrupt flag. It indicates completion of a serial transmission
at Serial Port 0. It is set by hardware at the end of bit 8 in mode 0 or
at the beginning of a stop bit in other modes. It must be cleared by
software.
Receive interrupt flag. It is set by hardware after completion of a
serial reception at Serial Port 0. It is set by hardware at the end of bit
8 in mode 0 or in the middle of a stop bit in other modes. It must be
cleared by software.
rate
rate
Table 92.Values of S0CON equation
.
.
) 7
=
) 7
=
64
2
Table 91. S0CON register
=
=
2
SMOD
: 1
: 0
SMOD
*
(
2
151 of 191
32
*
10
*
ckCpu
−
ckCpu
s
0
Figure 64. on page
rel
( *
)
Definition
Timer
Description
section 19.3.4
1
overflow
151:
rate
section
)
19.3.3.
a