nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 20

• Manufacturer Part Number: nRF24LE1
• Manufacturer: Nordic VLSI

nRF24LE1 Preliminary Product Specification
3.3.1.6
The following table
3.3.1.7
The timing information in this section relates to the transitions between modes and the timing for the rfce
bit. The transition from TX mode to RX mode or vice versa is the same as the transition from the standby
modes to TX mode or RX mode (130µs), as described in
Revision 1.1
RX mode
TX mode
TX mode
Standby-II
Standby-I
Power Down
Tpece2csn
Tpd2stby
a. If the
b. This operating mode pulses the
Note: If VDD is turned off, or if the nRF24LE1 enters Deep Sleep or Memory Retention mode, the
Tstby2a
Name
Mode
Thce
are carried out. The transmission continues as long as the TX FIFO is refilled. If the TX FIFO is empty
when the
sion of a packet is started as soon as the
FIFO.
This is the normal operating mode. After the packet is transmitted, the RF Transceiver enters
standby-I mode.
register values are lost and you must configure the RF Transceiver before entering the TX or
RX modes.
rfce
Operational modes configuration
Timing information
rfce
(Table
bit is held high the TX FIFO is emptied and all necessary ACK and possible retransmits
Power Down
Standby modes
Minimum rfce high
Delay from rfce pos. edge to
rfcsn low
PWR_UP
register
bit is still high, the RF Transceiver enters standby-II mode. In this mode the transmis-
3.) describes how to configure the operational modes.
1
1
1
1
1
0
RF Transceiver
Table 4. Operational timing of RF Transceiver
Table 3. RF Transceiver main modes
Standby mode
rfce
PRIM_RX
register
TX/RX mode
1
0
0
0
-
-
bit high for at least 10µs. This allows one packet to transmit.
rfcsn
20 of 191
Minimum 10µs
is set high after an upload (UL) of a packet to TX
high pulse
rfce
Table 4.
1
1
1
0
-
150µs
130µs
Max.
-
Data in TX FIFO. Will empty all lev-
els in TX FIFO
Data in TX FIFO.Will empty one
level in TX FIFO
TX FIFO empty
No ongoing packet transmission
-
Min.
10µs
4µs
FIFO state
a
.
b
.
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