MT93L04A Zarlink Semiconductor, MT93L04A Datasheet - Page 38

• Manufacturer Part Number: MT93L04A
• Manufacturer: Zarlink Semiconductor

MT93L04A
38
Echo Canceller A, Error Peak Detect Register 1 (EP)
Echo Canceller B, Error Peak Detect Register 1 (EP)
Echo Canceller A, Sin Peak Detect Register 2 (SP)
Echo Canceller B, Sin Peak Detect Register 2 (SP)
Echo Canceller A, Error Peak Detect Register 2 (EP)
Echo Canceller B, Error Peak Detect Register 2 (EP)
These peak detector registers allow the user to monitor the error signal peak level. The information is in
16-bit 2’s complement linear coded format presented in two 8 bit registers for each echo canceller. The
high byte is in Register 2 and the low byte is in Register 1.
These peak detector registers allow the user to monitor the send in signal (Sin) peak signal level. The
information is in 16-bit 2’s complement linear coded format presented in two 8 bit registers for each
echo canceller. The high byte is in Register 2 and the low byte is in Register 1.
Echo Canceller A, Sin Peak Detect Register 1 (SP)
Echo Canceller B, Sin Peak Detect Register 1 (SP)
EP15
Main Control Register 1
Main Control Register 2
Main Control Register 3
Main Control Register 4
Main Control Register 5
Main Control Register 6
Main Control Register 7
Main Control Register 8
Main Control Register 9
Main Control Register 10
Main Control Register 11
Main Control Register 12
Main Control Register 13
Main Control Register 14
Main Control Register 15
SP15
SP7
EP7
7
7
7
7
EP14
SP6
EP6
SP14
6
6
6
6
EP13
SP13
SP5
EP5
5
5
5
5
SP12
EP12
SP4
EP4
4
4
4
4
(EC group 1)
(EC group 2)
(EC group 3)
(EC group 4)
(EC group 5)
(EC group 6)
(EC group 7)
(EC group 8)
(EC group 9)
(EC group 10)
(EC group 11)
(EC group 12)
(EC group 13)
(EC group 14)
(EC group 15)
SP11
EP11
SP3
EP3
3
3
3
3
SP10
EP10
SP2
EP2
2
2
2
2
SP9
SP1
EP9
EP1
1
1
1
1
SP8
SP0
EP8
EP0
0
0
0
0
Read Address:
Read Address:
Read Address:
Read Address:
Read Address:
Read Address:
Read Address:
Read Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Read/Write Address:
Preliminary Information
0Fh
2Fh
0Eh
2Eh
11h
31h
10h
30h
+ Base Address
+ Base Address
+ Base Address
+ Base Address
+ Base Address
+ Base Address
+ Base Address
+ Base Address
Power Reset Value
Power Reset Value
Power Reset Value
Power Reset Value
401
402
403
404
405
406
407
408
409
40A
40B
40C
40D
40E
40F
N/A
N/A
N/A
N/A
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H