ADC08831IMM National Semiconductor, ADC08831IMM Datasheet - Page 13

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ADC08831IMM

Manufacturer Part Number
ADC08831IMM
Description
8-Bit Serial I/O CMOS A/D Converters with Multiplexer and Sample/Hold Function
Manufacturer
National Semiconductor
Datasheet

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Functional Description
3.0 Reducing Power Consumption
The ADC08831 operate up to a 2MHz clock frequency, or
about 181 ksps. At 5V supply, it consumes about 1.7 mA or
8.5 mW when CS is logic low. The ADC08831 has a low
power mode to minimize total power consumption.
When the chip select is asserted with a logic high, some ana-
log circuitry and digital logic are pulled to a static, low power
condition. Also, DOUT, the output driver is taken into
TRI-STATE mode.
To optimize static power consumption, special attention is
needed to the digital input logic signals: CLK, CS, DI. Each
digital input has a large CMOS buffer between V
GND. A traditional TTL level high (2.4V) will be sufficient for
each input to read a logical “1”. However, there could be a
large V
voltage difference would cause static power dissipation,
even when chip select pin is high and the part is in low power
mode.
Therefore, to minimize static power dissipation, it is recom-
mended that all digital input logic levels should equal the
converter’s supply. Various CMOS logic is particularly well
suited for this application.
The reference pin on the ADC08831 is not affected by the
power-down mode. To reduce static reference current during
non-conversion time, there are a couple options. First, a low
voltage external reference (ie, 2.5V could be used). A shunt
reference, such as the LM385-2.5, could be powered by a
logic gate that is the inverse of the signal on CS . When CS
is high, the reference is off. As a second option, an external,
low on-resistance switch could be used.
The ADC08832 is similar to the ADC08831, except its refer-
ence is derived from V
low-power mode when CS is logic high, as the analog and
a) Ratiometric
IH
to V
CC
voltage difference at each input. Such a
CC
. The ADC08832 does enter a
DS100108-28
(Continued)
FIGURE 1. Reference Examples
CC
and
b) Absolute with a Reduced Span
13
digital logic enter static current modes. However power dis-
sipation from the reference ladder occurs, regardless of the
signal on CS
4.0 REFERENCE CONSIDERATIONS
The voltage applied to the reference input on these convert-
ers, V
difference between V
possible output codes apply. The devices can be used either
in ratiometric applications or in systems requiring absolute
accuracy. The reference pin must be connected to a voltage
source capable of driving the reference input resistance
which can be as low as 2.8k . This pin is the top of a resistor
divider string and capacitor array used for the successive ap-
proximation conversion.
In a ratiometric system the analog input voltage is propor-
tional to the voltage used for the A/D reference. This voltage
is typically the system power supply, so the V
tied to V
nique relaxes the stability requirements of the system refer-
ence as the analog input and A/D reference move together
maintaining the same output code for a given input condition.
For absolute accuracy, where the analog input varies be-
tween very specific voltage limits, the reference pin can be
biased with a time and temperature stable voltage source.
The LM385, LM336 and LM4040 reference diodes are good
low current devices to use with these converters.
The maximum value of the reference is limited to the V
supply voltage. The minimum value, however, can be quite
small (see Typical Performance Characteristics) to allow di-
rect conversions of transducer outputs providing less than a
5V output span. Particular care must be taken with regard to
noise pickup, circuit layout and system error voltage sources
when operating with a reduced span due to the increased
sensitivity of the converter (1 LSB equals V
REF
CC
, defines the voltage span of the analog input (the
(done internally on the ADC08832). This tech-
IN(MAX)
and V
IN(MIN)
over which the 256
DS100108-29
REF/
REF
256).
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pin can be
CC

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