HD3-15530-9 Intersil Corporation, HD3-15530-9 Datasheet

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HD3-15530-9

Manufacturer Part Number
HD3-15530-9
Description
CMOS Manchester Encoder-decoder
Manufacturer
Intersil Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD3-15530-9
Quantity:
286
March 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• Support of MlL-STD-1553
• Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.25 MBit/s
• Sync Identification and Lock-In
• Clock Recovery
• Manchester II Encode, Decode
• Separate Encode and Decode
• Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V
Ordering Information
Pinouts
CERDIP
CLCC
PDIP
PACKAGE
DECODER SHIFT CLK
SMD#
SMD#
UNIPOLAR DATA IN
SERIAL DATA OUT
BIPOLAR ZERO IN
DECODER RESET
BIPOLAR ONE IN
DECODER CLK
VALID WORD
COMMAND/
DATA SYNC
TAKE DATA
SHIFT CLK
ENCODER
-55
-55
TEMP. RANGE
-40
-40
-40
GND
o
o
o
o
o
C to +125
C to +125
C to +85
C to +85
C to +85
HD-15530 (CERDIP, PDIP)
10
11
12
1
2
3
4
5
6
7
8
9
TOP VIEW
o
o
o
o
o
C
C
C
C
C
|
Copyright
HD1-15530-9
HD1-15530-8
7802901JA
HD4-15530-9
HD4-15530-8
78029013A
HD3-15530-9
1.25 MEGABIT/s
©
24
23
22
21
20
19
18
17
16
15
14
13
Intersil Corporation 1999
V
ENCODER CLK
SEND CLK IN
SEND DATA
SYNC SELECT
ENCODER ENABLE
SERIAL DATA IN
BIPOLAR ONE OUT
OUTPUT INHIBIT
BIPOLAR
ZERO OUT
MASTER RESET
CC
6 OUT
F24.6
J28.A
E24.6
PKG. NO.
5-142
Description
The Intersil HD-15530 is a high performance CMOS device
intended to service the requirements of MlL-STD-1553 and
similar Manchester II encoded, time division multiplexed
serial data protocols. This LSI chip is divided into two
sections, an Encoder and a Decoder. These sections
operate completely independent of each other, except for the
Master Reset functions.
This circuit meets many of the requirements of MIL-STD-
1553. The Encoder produces the sync pulse and the parity
bit as well as the encoding of the data bits. The Decoder
recognizes the sync pulse and identifies it as well as decod-
ing the data bits and checking parity.
This integrated circuit is fully guaranteed to support the
1MHz data rate of MlL-STD-1553 over both temperature and
voltage. It interfaces with CMOS, TTL or N channel support
circuitry, and uses a standard 5V supply.
The HD-15530 can also be used in many party line digital
data communications applications, such as an environmen-
tal control system driven from a single twisted pair cable of
fiber optic cable throughout the building.
UNIPOLAR
SHIFT CLK
DECODER
DECODER
BIPOLAR
BIPOLAR
CMOS Manchester Encoder-Decoder
ZERO IN
DATA IN
ONE IN
CLK
NC
NC
10
11
5
6
7
8
9
HD-15530
12
4
13
3
HD-15530 (CLCC)
14
TOP VIEW
2
15
1
16
28
17
27
File Number
18
26
25
24
23
22
21
20
19
SEND
DATA
NC
NC
SYNC
SELECT
ENCODER
ENABLE
SERIAL
DATA IN
BIPOLAR
ONE OUT
2960.1

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HD3-15530-9 Summary of contents

Page 1

... CLCC - +85 C HD4-15530 - +125 C HD4-15530-8 SMD# 78029013A o o PDIP - +85 C HD3-15530-9 Pinouts HD-15530 (CERDIP, PDIP) TOP VIEW VALID WORD 1 ENCODER 2 SHIFT CLK TAKE DATA 3 SERIAL DATA OUT 4 DECODER CLK 5 BIPOLAR ZERO IN 6 BIPOLAR ONE IN 7 UNIPOLAR DATA IN ...

Page 2

Block Diagrams ENCODER GND 12 MASTER RESET 13 SEND CLK OUT 2 14 CHARACTER FORMER 6 ENCODER CLK 23 BIT 18 19 COUNTER 2 21 SERIAL DATA IN SEND DATA ENCODER ENABLE ENCODER SHIFT CLK Pin Description ...

Page 3

Pin Description (Continued) PIN NUMBER TYPE NAME 18 I SERIAL DATA ENCODER ENABLE 20 I SYNC SELECT 21 O SEND DATA 22 I SEND CLOCK ENCODER CLOCK Input ...

Page 4

Decoder Operation The Decoder requires a single clock with a frequency of 12 times the desired data rate applied at the DECODER CLOCK input. The Manchester II coded data can be presented to the Decoder in one of two ways. ...

Page 5

How to Make Our MTU Look Like a Manchester Encoded UART VALID WORD DECODER ENCODER CLK BIPOLAR ZERO IN BIPOLAR ONE IN UNIPOLAR DATA IN COMMAND SYNC DECODER RESET 74LS164 74LS164 PARALLEL OUT Typical ...

Page 6

MIL-STD-1553 The 1553 standard defines a time division multiplexed data bus for application within aircraft. The bus is defined to be bipolar, and encoded in a Manchester II format component appears on the bus. This allows transformer ...

Page 7

Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 8

AC Electrical Specifications V CC PARAMETER SYMBOL ENCODER TIMING Encoder Clock Frequency FEC Send Clock Frequency FESC Encoder Data Rate FED Master Reset Pulse Width TMR Shift Clock Delay TE1 Serial Data Setup TE2 Serial Data Hold TE3 Enable Setup ...

Page 9

Timing Waveforms SEND CLOCK ENCODER SHIFT CLOCK T E2 VALID SERIAL DATA IN SEND CLOCK ENCODER SHIFT CLOCK ENCODER ENABLE SYNC SELECT ENCODER SHIFT CLOCK SEND DATA SEND CLOCK BIPOLAR ONE OUT OR BIPOLAR ZERO OUT DECODER SHIFT CLOCK T ...

Page 10

Timing Waveforms (Continued) BIT PERIOD BIPOLAR ONE BIPOLAR ZERO IN COMMAND SYNC BIPOLAR ONE IN BIPOLAR ZERO DATA SYNC T D1 BIPOLAR ONE BIPOLAR ZERO ONE NOTE: ...

Page 11

Burn-In Circuits GND A A GND GND GND R2 GND NOTES 5.5V 0. 4.5V 10 -0.2V +0. ...

Page 12

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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