NJU6624C New Japan Radio, NJU6624C Datasheet
NJU6624C
Available stocks
Related parts for NJU6624C
NJU6624C Summary of contents
Page 1
... CONTROLLER DRIVER with SMOOTH SCROLL FUNCTION g g GENERAL DESCRIPTION GENERAL DESCRIPTION The NJU6624C is a Dot Matrix LCD controller driver for 14-character 1- The NJU6624C is a Dot Matrix LCD controller driver for 14-character 1- line with icon display in single chip. line with icon display in single chip. ...
Page 2
... stru ctio r( spla y Data RAM (DD RAM x8b its Character Icon Display Generator RAM RAM (MK RAM) (CG RAM) 12x5bits 5x7x32bits NJU6624C NJU6624C SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 ...
Page 3
... Key request signal output terminal. Key scanning input terminals. LCD segment driving signal output / Key scanning output terminals. LCD segment driving signal output terminals Non connection terminal LCD common driving signal output terminals Icon common driving signal output terminals NJU6624C NJU6624C 145KHz ). ...
Page 4
... The storage capacity 224 kinds dots character pattern(available address is (20) The correspondence between character code and standard character pattern of NJU6624C is shown in Table 2. The correspondence between character code and standard character pattern of NJU6624C is shown in Table 2. User-defined character patterns (Custom Font) are also available by mask option. ...
Page 5
... Table 2. CG ROM Character Pattern ( ROM version -02 ) Table 2. CG ROM Character Pattern ( ROM version -02 ) NJU6624C NJU6624C ...
Page 6
... NJU6624C NJU6624C -(1F) -(1F) should be written should be written Character Pattern (CG RAM Data Upper Lower bit ...
Page 7
... Display RAM (MK RAM) (1-6)Icon Display RAM (MK RAM) The NJU6624C can display maximum 70 Icons. The NJU6624C can display maximum 70 Icons. The Icon Display can be controlled by writing the Data in MK RAM corresponds to the Icon. The Icon Display can be controlled by writing the Data in MK RAM corresponds to the Icon. ...
Page 8
... When the NJU6624C detect the key pressing by the key scan circuit, it outputs “H” signal as the request signal When the NJU6624C detect the key pressing by the key scan circuit, it outputs “H” signal as the request signal from the “ ...
Page 9
... NJU6624 NJU6624C NJU6624C VLCD2 VLCD2 VSS VSS KH2 KH1 KH0 OFF D5 D4 ...
Page 10
... Note : In case of can not read out correct. Note : In case of can not read out correct. NJU6624 NJU6624 NJU6624C NJU6624C ON OFF OFF ...
Page 11
... By Hardware (2-2)Initialization By Hardware The NJU6624C incorporates RESET terminal to initialize the all system. When the "L" level input over 1.2ms to The NJU6624C incorporates RESET terminal to initialize the all system. When the "L" level input over 1.2ms to the RESET terminal, reset sequence is executed. In this time, busy signal output during 250us (fosc=145kHz) the RESET terminal, reset sequence is executed. In this time, busy signal output during 250us (fosc=145kHz) after RESET terminal goes to " ...
Page 12
... The NJU6624C incorporates two registers, an Instruction Register (IR) and a Data Register(DR). These two registers store control information temporarily to allow interface between NJU6624C and MPU or These two registers store control information temporarily to allow interface between NJU6624C and MPU or peripheral ICs operating different cycles. ...
Page 13
... Display is is set into the address counter. Display (I/D) and DB (I/D) and DB (S), as shown below. (S), as shown below NJU6624C NJU6624C ...
Page 14
... Alternating display (2)Blink display example (2)Blink display example Address to the right or left without writing or reading display data. to the right or left without writing or reading display data NJU6624C NJU6624C (D) and DB (D) and DB (B), as shown below ...
Page 15
... Initial status is ”L” shown below. as shown below NJU6624C NJU6624C Initial status is ”L” ...
Page 16
... MK RAM MK RAM : : (10) (10) - (1D) - (1D AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0 RAM address RAM address CG RAM CG RAM : : (00) (00) - (FE) - (FE NJU6624C NJU6624C AD4 AD3 AD2 AD1 AD0 DD/MK RAM. RAM ...
Page 17
... DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0 KL3 KL2 KL1 KL0 NJU6624C NJU6624C DM4 DM3 DM2 DM1 DM0 DC4 DC3 DC2 DC1 DC0 ...
Page 18
... If the power supply conditions for the correct operation of the internal reset circuits are not satisfied, the If the power supply conditions for the correct operation of the internal reset circuits are not satisfied, the NJU6624C must be initialized by the instruction. NJU6624C must be initialized by the instruction. ...
Page 19
... LCD frame frequency (5-2)Relation between oscillation frequency and LCD frame frequency As the NJU6624C incorporate oscillation capacitor and resistor for CR oscillation, 145kHz oscillation is available As the NJU6624C incorporate oscillation capacitor and resistor for CR oscillation, 145kHz oscillation is available without any external components. ...
Page 20
... The inputs data and latched at rising edge of shift clock (SCL) and the first 16-bit data are fetched into the NJU6624C at the rising edge of chip select (CS). The data over than 16 bits are ignored. If the input data into the NJU6624C at the rising edge of chip select (CS). The data over than 16 bits are ignored. If the input data are less than 16 bits,they are ignored at the rising edge of " ...
Page 21
... VDD=5V, Ta= stand-by mode VLCD1-VSS=8V,Ta= E.V.R. value "1111" COM/SEG terminal o VLCD1-VSS=8V,Ta=25 C E.V.R. value "1111" VDD=5V,Ta= NJU6624C NJU6624C (Ta=25 (Ta= UNIT and V and V due to the stabilized operation for the ...
Page 22
... SEG to SEG ) respectively, and measured when the current I ) respectively, and measured when the current load condition load condition. LCD1 LCD1 NJU6624C NJU6624C VLCD2 or V VLCD2 and ) and SS, SS VLCD2 VLCD2 or V ...
Page 23
... KDD t SRWD t CRWD t CH2 CYCE t SISU SIH Input data sequence Input data sequence KDD Output Output Input data sequence Input data sequence NJU6624C NJU6624C +8.0V, Ta=25 +8.0V, Ta= MIN. MAX. CONDITION 1 - 300 - 100 - 300 - fig.1 300 - 300 - 300 - - 300 - 300 fig.2 ...
Page 24
... MIN t - 0.1 rDD OFF tOFF tOFF 2.4V 2.4V 0.2V 0.2V tOFF > 1ms tOFF > 1ms = = = = SYMBOL CONDITION MIN rDD OFF tKP tKP tKS tKS NJU6624C NJU6624C TYP MAX UNIT - - (Ta= TYP MAX UNIT - 0.2V 0. =145kHz) =145kHz) OSC OSC TYP MAX UNIT 221 - us 27 VLCD2/2 ...
Page 25
... VSS VLCD VLCD V1 V1 SEG1 SEG1 VSS VSS VLCD VLCD V1 V1 SEG2 SEG2 VSS VSS ........... NJU6624C NJU6624C ......... Keyscan wave form is Keyscan wave form 1 2 ...
Page 26
... VDD VLCD1 VLCD1 VLCD2 VLCD2 VSS VSS NJU6624C NJU6624C COM1 COM1 COM7 COM7 LCD Panel LCD Panel (14-character (14-character 1-line+Icon) 1-line+Icon) SEG1 SEG1 SEG70 SEG70 ...
Page 27
MEMO [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not ...