P4095 EM Microelectronic, P4095 Datasheet - Page 8

• Manufacturer Part Number: P4095
• Description: P4095 Read/write Analog Front End For 125khz Rfid Basestation
• Manufacturer: EM Microelectronic

In the case AM modulation communication protocol
reader to transponder (eg. P4069) is needed a single
ended configuration has to be used (figure 4). When
pin MOD is pulled high driver on ANT1 is put in three
state, driver RDY/CLK continues driving thus
maintaining lower antenna current. Modulation index
is adjusted by resitor R
RDY/CLK signal becomes active only after the
demodulation chain operating point is set.
Before it is pulled down by high impedance pull down
resistor (100 kΩ) in order not to load ANT1 output. In
the case of AM modulation configuration the total
antenna current change at the moment RDY/CLK pin
becomes active, so external microprocessor has to
wait another T
DEMOD_OUT.
Read Only mode with external peak detector
Read/Write mode with external peak detector
© EM Microelectronic-Marin SA, 06/2000, Rev. C/296
8
C
C
C
C
DV1
DV2
DV1
DV2
L
L
A
A
C
C
+5V
+5V
+5V
+5V
RES
RES
SET
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RDY/CLK
RDY/CLK
P4095
P4095
before it can start observing
Figure 5
Figure 6
AM
16
15
14
13
12
11
10
16
15
14
13
12
11
10
9
9
. As mentioned above
DEMOD_OUT
DEMOD_OUT
C1
C1
MOD
MOD
SHD
D1
SHD
D1
C
C
C
C
C
C
C
C
DC2
FCAP
DEC
DC2
FCAP
DEC
AGND
AGND
R1
R1
µP
µP
As mentioned above for high Q antennas the voltage
on antenna is high and read sensitivity is limited by
demodulator sensitivity due to capacitive divider.
Read sensitivity (and thus reading range) can be
increased by using external envelope detector circuit.
Input is taken on antenna high voltage side output is
directly fed to CDEC_IN pin. However, the capacitor
divider is still needed for PLL locking. Such
configuration is shown in figure 5, the envelope
detector is formed by three components: D1, R1 and
C1.
The configuration presented in figure 5 may also be
used for read write applications but it has a
drawback in the case fast recovery of reading is
needed after communication reader to transponder
is finished. The reason is in fact that DC voltage after
diode D1 is lost during modulation and it takes very
long time before it is established again.
Figure 6 presents a solution to that problem. A high
voltage NMOS transistor blocks the discharge path
during modulation, so operating point is preserved.
The signal controlling NMOS gate has to be put low
synchronously with signal MOD, but it can be put
high only after the amplitude on antenna has
recovered after modulation.
PCB Layout
Refer to "P4095 Application Note".
P4095