L320MT90QI Advanced Micro Devices, L320MT90QI Datasheet - Page 10

• Manufacturer Part Number: L320MT90QI
• Description: 32 Megabit 2 M X 16-bit/4 M X 8-bit Mirrorbit 3.0 Volt-only Boot Sector Flash Memory - Advanced Micro Devices
• Manufacturer: Advanced Micro Devices

DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
Legend: L = Logic Low = V
A
Notes:
1. Addresses are A20:A0 in word mode; A20:A-1 in byte mode. Sector addresses are A20:A12 in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector Group
3. If WP# = V
4. D
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O
pins operate in the byte or word configuration. If the
BYTE# pin is set at logic ‘1’, the device is in word con-
figuration, DQ0–DQ15 are active and controlled by
CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte
configuration, and only data I/O pins DQ0–DQ7 are
active and controlled by CE# and OE#. The data I/O
10
Read
Write (Program/Erase)
Accelerated Program
Standby
Output Disable
Reset
Sector Group Protect
(Note 2)
Sector Group Unprotect
(Note 2)
Temporary Sector Group
Unprotect
IN
Protection and Unprotection” section.
unprotected as determined by the method described in “Sector Group Protection and Unprotection”. All sectors are unprotected
when shipped from the factory (The SecSi Sector may be factory protected depending on version ordered.)
= Address In, D
IN
Operation
or D
OUT
IL
, the first or last sector remains protected. If WP# = V
as required by command sequence, data polling, or sector protect algorithm (see Figure 2).
IN
= Data In, D
V
0.3 V
CE#
CC
IL
X
X
L
L
L
L
L
L
, H = Logic High = V
OE#
OUT
H
H
X
H
X
H
H
X
L
= Data Out
WE# RESET#
H
H
L
X
X
L
L
X
L
Table 1. Device Bus Operations
IH
V
0.3 V
V
V
V
CC
, V
D A T A S H E E T
H
H
H
H
L
ID
ID
ID
ID
Am29LV320MT/B
= 11.5–12.5 V, V
(Note 3)
(Note 3)
WP#
X
X
X
X
H
H
H
IH
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device.
puts and control levels they require, and the resulting
output. The following subsections describe each of
these operations in further detail.
pins DQ8–DQ14 are tri-stated, and the DQ15 pin is
used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE#
should remain at V
, the top two or bottom two sectors will be protected or
ACC
V
X
X
H
X
X
X
X
X
HH
HH
= 11.5–12.5 V, X = Don’t Care, SA = Sector Address,
Table 1
A3=L, A2=L,
A3=L, A2=L,
A1=H, A0=L
A1=H, A0=L
Addresses
SA, A6 =L,
SA, A6=H,
(Note 2)
A
A
A
A
X
X
X
IN
IN
IN
IN
lists the device bus operations, the in-
IH
.
(Note 4) (Note 4)
(Note 4) (Note 4)
(Note 4)
(Note 4)
(Note 4) (Note 4)
High-Z
High-Z
High-Z
DQ0–
D
DQ7
OUT
BYTE#
High-Z
High-Z
High-Z
IL
= V
D
. CE# is the power
OUT
X
X
IH
DQ8–DQ15
May 16, 2003
DQ15 = A-1
DQ8–DQ14
= High-Z,
BYTE#
High-Z
High-Z
High-Z
High-Z
= V
X
X
IL