MACH1 Lattice, MACH1 Datasheet - Page 2

no-image

MACH1

Manufacturer Part Number
MACH1
Description
High-Performance EE CMOS Programmable Logic
Manufacturer
Lattice
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MACH110
Manufacturer:
AMD
Quantity:
5 510
Part Number:
MACH110
Quantity:
5 510
Part Number:
MACH110-10JC-12JI
Quantity:
12 388
Part Number:
MACH110-120JC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
MACH110-12JC
Manufacturer:
AMD
Quantity:
1 000
Part Number:
MACH110-12JC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
MACH110-12JC-14JI
Manufacturer:
AMD
Quantity:
5 510
Part Number:
MACH110-12JC-14JI
Manufacturer:
CYP
Quantity:
5 510
Part Number:
MACH110-12JC-14JI
Manufacturer:
LT
Quantity:
780
Part Number:
MACH110-12JC-14JI
Manufacturer:
AMD
Quantity:
20 000
Part Number:
MACH110-15JC
Manufacturer:
AMD
Quantity:
1 000
Part Number:
MACH110-15JC
Manufacturer:
AMD
Quantity:
20 000
Part Number:
MACH110-15JC-18JI
Manufacturer:
AMD
Quantity:
20 000
Part Number:
MACH110-15JC-18JI
Quantity:
177
Note:
1. Values in parentheses ( ) are for the SP version.
GENERAL DESCRIPTION
The MACH
Programmable Logic Devices (CPLDs), addressing the growing need for speed in networking,
telecommunications and computing. MACH 1 & 2 devices are available in speeds as fast as 5.0-ns
t
users include guaranteed high performance for entry-to-mid-level logic needs at a low cost.
Notes:
1. C = Commercial, I = Industrial
2. -5 speed grade for MACH111 (SP) = 5.0 ns t
3. -5 speed grade for MACH131(SP) = 5.5 ns t
The MACH 1 & 2 families consist of ten devices—five base options, each with a counterpart that
includes JTAG-compatible in-system programming (ISP). These devices offer five different density-
I/O combinations in Thin Quad Flat Pack (TQFP), Plastic Quad Flat Pack (PQFP), and Plastic
Leaded Chip Carrier (PLCC) packages from 44 to 100 pins (Table 3). Each MACH 1 & 2 device is
PCI compliant and includes other features such as SpeedLocking architecture for guaranteed fixed
timing, Bus-Friendly inputs and I/Os, and programmable power-down mode for extra power
savings.
2
Macrocells
Maximum user I/O pins
t
t
t
f
MACH111
MACH111SP
MACH131
MACH131SP
MACH211
MACH211SP
MACH221
MACH221SP
MACH231
MACH231SP
PD
P D
S
CO
CNT
(ns)
(ns)
(ns)
(MHz)
and in densities ranging from 32 to 128 macrocells (Tables 1 and 2). The overall benefits for
Feature
®
Device
1 & 2 families from Lattice/Vantis offer high-performance, low cost Complex
MACH111 (SP)
Table 1. MACH 1 and 2 Family Device Features
Table 2. MACH 1 and 2 Family Speed Grades
C (Note 2)
C (Note 2)
C (Note 3)
C (Note 3)
182
5.0
3.5
3.5
32
32
PD
PD
-5
MACH 1 & 2 Families
-6
C
C
MACH131 (SP)
182
5.5
3.0
64
64
4
C, I
C, I
C, I
C, I
-7
C
C
C
C
C
MACH211 (SP)
-10
C, I
C, I
C, I
C, I
C, I
C, I
C, I
C, I
133 (166)
7.5 (6.0)
C
C
5.5 (5)
4.5 (4)
64
32
-12
C, I
C, I
C, I
C, I
C, I
C, I
C, I
C, I
C, I
C, I
1
1
MACH221 (SP)
133
7.5
5.5
-14
96
48
5
I
I
I
I
I
I
I
I
I
I
-15
C
C
C
C
C
C
C
C
C
C
MACH231 (SP)
166 (100)
6.0 (10)
5 (6.5)
4 (6.5)
128
64
-18
I
I
I
I
I
I
I
I
I
I

Related parts for MACH1