IDT82P20416 Integrated Device Technology, IDT82P20416 Datasheet - Page 16

• Manufacturer Part Number: IDT82P20416
• Description: 16-channel Short Haul T1/e1/j1 Line Interface Unit
• Manufacturer: Integrated Device Technology

Pin Description
IDT82P20416
VCOMEN
VCOM[0]
VCOM[1]
TEHWE
TEHW
Name
CLKA
CLKB
REF
RIM
OE
(Pull-Down)
(Pull-Down)
(Pull-Up)
(Pull-Up)
Output
Input
Input
Input
Input
Input
Input
Input
I / O
-
Pin No.
AA14
AB11
AB10
M20
M19
V14
V12
L19
L20
V11
CLKA: External T1/E1 Clock Input A
External T1/J1 (1.544 MHz) or E1 (2.048 MHz) clock is input on this pin.
When not used, this pin should be connected to GNDD.
CLKB: External T1/E1 Clock Input B
External T1/J1 (1.544 MHz) or E1 (2.048 MHz) clock is input on this pin.
When not used, this pin should be connected to GNDD.
VCOM: Voltage Common Mode [1:0]
These pins are used only when the receive line interface is in Receive Differential mode and
connected without a transformer (transformer-less).
To enable these pins, the VCOMEN pin must be connected high. Refer to Figure-6 for the
connection.
When these pins are not used, they should be left open.
VCOMEN: Voltage Common Mode Enable
This pin should be connected high only when the receive line interface is in Receive Differen-
tial mode and connected without a transformer (transformer-less).
When not used, this pin should be left open.
REF: Reference Resistor
An external resistor (10 KΩ, ±1%) is used to connect this pin to ground to provide a standard
reference current for internal circuit. This resistor is required to ensure correct device opera-
tion.
RIM: Receive Impedance Matching
In Receive Differential mode, when RIM is low, all 16 receivers become High-Z and only exter-
nal impedance matching is supported. In this case, the per-channel impedance matching con-
figuration bits - the R_TERM[2:0] bits (b2~0, RCF0,...) and the R120IN bit (b4, RCF0,...) - are
ignored.
In Receive Differential mode, when RIM is high, impedance matching is configured on a per-
channel basis by the R_TERM[2:0] bits (b2~0, RCF0,...) and the R120IN bit (b4, RCF0,...).
This pin can be used to control the receive impedance state for Hitless Protection applica-
tions. Refer to Section 4.4 Hitless Protection Switching (HPS) Summary for details.
In Receive Single Ended mode, this pin should be left open.
OE: Output Enable
OE enables or disables all Line Drivers globally.
A high level on this pin enables all Line Drivers while a low level on this pin places all Line
Drivers in High-Z state and independent from related register settings.
Note that the functionality of the internal circuit is not affected by OE.
If this pin is not used, it should be tied to VDDIO.
This pin can be used to control the transmit impedance state for Hitless protection applica-
tions. Refer to Section 4.4 Hitless Protection Switching (HPS) Summary for details.
TEHWE: Hardware T1/J1 or E1 Mode Selection Enable
When this pin is open, the T1/J1 or E1 operation mode is selected by TEHW globally.
When this pin is low, the T1/J1 or E1 operation mode is selected by the T1E1 bit (b0,
CHCF,...) on a per-channel basis.
TEHW: Hardware T1/J1 or E1 Mode Selection
When TEHWE is open, this pin selects the T1/J1 or E1 operation mode globally:
Low - E1 mode;
Open - T1/J1 mode.
When TEHWE is low, the input on this pin is ignored.
Common Control
16
16-CHANNEL SHORT HAUL T1/E1/J1 LINE INTERFACE UNIT
Description
December 17, 2009