SI5010 ETC, SI5010 Datasheet - Page 7

• Manufacturer Part Number: SI5010
• Description: OC-12/3 / STM-4/1 SONET/SDH CLOCK AND DATA RECOVERY IC
• Manufacturer: ETC

Table 4. AC Characteristics (PLL Characteristics)
(V
Table 3. AC Characteristics (Clock & Data)
(V
Parameter
Jitter Tolerance (OC-12 Mode)
Jitter Tolerance (OC-3 Mode)
RMS Jitter Generation
Peak-to-Peak Jitter Generation
Jitter Transfer Bandwidth
Jitter Transfer Peaking
Acquisition Time
Input Reference Clock Duty Cycle
Reference Clock Range
Input Reference Clock Frequency
Tolerance
Frequency Difference at which
Receive PLL goes out of Lock
(REFCLK compared to the divided
down VCO clock)
Frequency Difference at which
Receive PLL goes into Lock
(REFCLK compared to the divided
down VCO clock)
*Note: Bellcore specifications: GR-253-CORE, Issue 2, December 1995. Using PRBS 2
Parameter
Output Clock Rate
Output Rise Time
Output Fall Time
Clock to Data Delay
OC-12
OC-3
Input Return Loss
A
DD
2.5 V ± 5%, T
= 2.5 V ± 5%, T
A
= –40°C to 85°C)
A
= –40°C to 85°C)
*
*
*
*
*
Symbol
J
J
Symbol
J
J
GEN(RMS)
t
C
f
GEN(PP)
TOL(PP)
TOL(PP)
LOCK
(c-d)
C
CLK
LOL
t
J
t
T
DUTY
R
F
J
BW
TOL
AQ
P
Preliminary Rev. 0.31
with no jitter on serial data
with no jitter on serial data
From the return of valid
100 kHz–622 MHz
After falling edge of
Test Condition
Test Condition
PWRDN/CAL
OC-12 Mode
OC-3 Mode
f = 250 kHz
f = 6.5 kHz
f = 300 Hz
f = 25 kHz
f = 300 Hz
f = 65 kHz
Figure 4
Figure 4
Figure 3
f < 2 MHz
f = 30 Hz
f = 30 Hz
data
19.44
–100
18.7
TBD
TBD
Min
1.45
Min
.15
0.4
0.4
23
—
—
—
—
40
40
40
40
—
—
—
—
—
4
4
4
4
–1 data pattern.
4100
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Typ
100
100
890
Typ
600
300
1.6
.03
1.5
—
—
25
60
50
—
—
—
155.52
TBD
TBD
TBD
TBD
Max
Si5010
Max
TBD
TBD
666
500
130
150
100
3.0
0.1
1.7
—
55
60
—
—
—
—
—
—
—
—
MHz
Unit
Unit
UI
UI
UI
UI
UI
UI
UI
UI
MHz
ppm
ppm
ppm
mUI
mUI
kHz
kHz
dB
dB
ms
ps
ps
ps
ps
%
PP
PP
PP
PP
PP
PP
PP
PP
s
7