TDA10045 Philips Semiconductors, TDA10045 Datasheet - Page 7

• Manufacturer Part Number: TDA10045
• Description: DVB-T channel receiver
• Manufacturer: Philips Semiconductors

Philips Semiconductors
2001 Nov 08
DEN
OCLK
DO[7:5]
V
V
DO[4:0]
V
V
XIN
XOUT
V
V
n.c.
V
DGND
n.c.
PPLGND
V
V
V
V
V
V
V
V
V
V
V
V
V
DDD18
SSD
DDD33
SSD
DDD18
SSD
CCD(PLL)
CCA(PLL)
SSA3
DDA3
IP
IM
ref(neg)
ref(pos)
DDA3
SSA3
SSA2
DDA2
SSA1
DDD1
DVB-T channel receiver
SYMBOL
67 to 69
72 to 76
PIN
100
65
66
70
71
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
TYPE
I
O
O
O
O
O
(2)
output data validation signal; active HIGH during the valid and regular data bytes
output clock; OCLK is the output clock for the parallel DO[7:0] outputs
output data carrying the current sample of the current MPEG2 packet
(188 bytes), delivered on the rising edge of OCLK by default when the serial
mode is selected. The output data is delivered by DO[0].
digital supply voltage for the core (1.8 V typ.)
digital ground supply (0 V)
output data carrying the current sample of the current MPEG2 packet
(188 bytes), delivered on the rising edge of OCLK by default when the serial
mode is selected. The output data is delivered by DO[0].
digital supply voltage for the pads (3.3 V typ.)
digital ground supply (0 V)
crystal oscillator input pin
crystal oscillator output pin; typically a fundamental crystal oscillator is
connected between pins XIN and XOUT
digital supply voltage for the core (1.8 V typ.)
digital ground supply (0 V)
not connected
power supply input for the digital circuits of the PLL module (1.8 V typ.)
ground return for the digital circuits of the PLL module
not connected
ground return for the analog circuits of the PLL module
power supply input for the analog circuits of the PLL module (3.3 V typ.)
ground return for the analog circuits
power supply input for the analog circuits; the DC voltage should be 3.3 V
positive input to the ADC; this pin is DC biased to half supply through an internal
resistor divider (2
the voltage difference between pins V
+0.5 V.
negative input to the ADC; this pin is DC biased to half supply to remain in the
range of the ADC, the voltage difference between pins V
between 0.5 and +0.5 V through an internal resistor divider (2
resistors)
negative reference voltage for the ADC
positive reference voltage for the ADC
power supply input for the analog circuits; the DC voltage should be 3.3 V
ground return for analog circuits
ground return for the analog clock drivers
power supply input for the analog clock drivers; the DC voltage should be 3.3 V
ground return for the digital switching circuitry
power supply input for the digital switching circuitry; sensitive to the supply
noise; the DC voltage should be 1.8 V
20 k resistors). In order to remain in the range of the ADC,
7
DESCRIPTION
IP
and V
IM
should be between 0.5 and
IP
and V
TDA10045H
Product specification
IM
20 k
should be