MCP6S21

Manufacturer Part NumberMCP6S21
DescriptionSingle-Ended, Rail-to-Rail I-O, Low Gain PGA
ManufacturerN/A
MCP6S21 datasheet
 


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M
Single-Ended, Rail-to-Rail I/O, Low Gain PGA
Features
• Multiplexed Inputs: 1, 2, 6 or 8 channels
• 8 Gain Selections:
- +1, +2, +4, +5, +8, +10, +16 or +32 V/V
• Serial Peripheral Interface (SPI™)
• Rail-to-Rail Input and Output
• Low Gain Error: ±1% (max)
• Low Offset: ±275 µV (max)
• High Bandwidth: 2 to 12 MHz (typ)
• Low Noise: 10 nV/ Hz @ 10 kHz (typ)
• Low Supply Current: 1.0 mA (typ)
• Single Supply: 2.5V to 5.5V
Typical Applications
• A/D Converter Driver
• Multiplexed Analog Applications
• Data Acquisition
• Industrial Instrumentation
• Test Equipment
• Medical Instrumentation
Package Types
MCP6S21
MCP6S22
PDIP, SOIC, MSOP
PDIP, SOIC, MSOP
V
V
V
1
8
1
OUT
DD
OUT
CH0
2
7
SCK
CH0
2
V
3
SI
CH1
3
6
REF
V
V
4
5
4
CS
SS
SS
MCP6S26
MCP6S28
PDIP, SOIC, TSSOP
PDIP, SOIC
V
V
V
1
14
1
OUT
DD
OUT
CH0
2
13
SCK
CH0
2
CH1
3
12
SO
CH1
3
4
CH2
4
11
SI
CH2
CH3
5
10
CS
CH3
5
V
CH4
6
9
CH4
6
SS
V
CH5
7
8
CH5
7
REF
CH6
8
2003 Microchip Technology Inc.
MCP6S21/2/6/8
Description
The Microchip Technology Inc. MCP6S21/2/6/8 are
analog Programmable Gain Amplifiers (PGA). They
can be configured for gains from +1 V/V to +32 V/V and
the input multiplexer can select one of up to eight chan-
nels through an SPI port. The serial interface can also
put the PGA into shutdown to conserve power. These
PGAs are optimized for high speed, low offset voltage
and single-supply operation with rail-to-rail input and
output capability. These specifications support single
supply applications needing flexible performance or
multiple inputs.
The one channel MCP6S21 and the two channel
MCP6S22 are available in 8-pin PDIP, SOIC and
MSOP packages. The six channel MCP6S26 is avail-
able in 14-pin PDIP, SOIC and TSSOP packages. The
eight channel MCP6S28 is available in 16-pin PDIP
and SOIC packages. All parts are fully specified from
-40°C to +85°C.
Block Diagram
CH0
CH1
CH2
CH3
MUX
CH4
CH5
V
8
DD
CH6
7
SCK
CH7
6
SI
CS
5
CS
SI
SPI™
SO
Logic
SCK
POR
V
16
V
DD
15
SCK
14
SO
13 SI
12
CS
V
11
SS
V
10
REF
9
CH7
V
DD
+
V
OUT
-
R
F
8
Gain
Switches
R
G
V
REF
SS
DS21117A-page 1

MCP6S21 Summary of contents

  • Page 1

    ... These specifications support single supply applications needing flexible performance or multiple inputs. The one channel MCP6S21 and the two channel MCP6S22 are available in 8-pin PDIP, SOIC and MSOP packages. The six channel MCP6S26 is avail- able in 14-pin PDIP, SOIC and TSSOP packages. The eight channel MCP6S28 is available in 16-pin PDIP and SOIC packages ...

  • Page 2

    ... MCP6S21/2/6/8 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † .........................................................................7. All inputs and outputs....................... Difference Input voltage ........................................ |V Output Short Circuit Current...................................continuous Current at Input Pin Current at Output and Supply Pins Storage temperature .....................................-65°C to +150°C Junction temperature .................................................. +150°C ESD protection on all pins (HBM;MM) † ...

  • Page 3

    ... kHz (Note — 4 — fA kHz ni vs. G data. ni MCP6S21/2/6/8 = GND V/V, SS REF SS Conditions (Note (Note (Note -40°C to+85°C A exclude digital switching currents. Q_SHDN = GND, V ...

  • Page 4

    ... MCP6S21/2/6/8 DIGITAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, T Input = CH0 = (0.3V)/G, CH1 to CH7 = 0.3V, R Parameters SPI Inputs (CS, SI, SCK) Logic Threshold, Low Input Leakage Current Logic Threshold, High Amplifier Output Leakage Current SPI Output (SO, for MCP6S26 and MCP6S28) Logic Threshold, Low Logic Threshold, High ...

  • Page 5

    ... Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-PDIP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Thermal Resistance, 16L-PDIP Thermal Resistance, 16L-SOIC Note 1: The MCP6S21/2/6/8 family of PGAs operates over this extended temperature range, but with reduced performance. Operation in this range must not cause T (150°C ...

  • Page 6

    ... MCP6S21/2/6 CSSC SCK (first 16 bits out are always zeros) FIGURE 1-5: Detailed SPI Serial Interface Timing, SPI 0,0 mode CSSC SCK (first 16 bits out are always zeros) FIGURE 1-6: Detailed SPI Serial Interface Timing, SPI 1,1 mode. ...

  • Page 7

    ... Figure 1-8 shows the Integral Non-Linearity (INL) of the V + 0.3V OS output voltage. EQUATION = 0.3V and The output non-linearity specification in the electrical specifications is related to Figure 1-8 by: EQUATION = +1 INL ( FIGURE 1-8: standard condition V MCP6S21/2/6/8 ( ( Output Voltage Model with = ...

  • Page 8

    ... MCP6S21/2/6/8 1.1.4 DIFFERENT V CONDITIONS REF Some of the plots in Section 2.0, “Typical Performance Curves”, have the conditions V REF The equations and figures above are eas- REF DD ily modified for these conditions. The ideal V becomes: EQUATION – V O_ideal REF ...

  • Page 9

    ... DC Gain Error, G +2. 22% 420 Samples 20 -40 to +125°C A 18% 16% 14% 12% 10 Ladder Resistance Drift (%/°C) FIGURE 2-3: Ladder Resistance Drift. 2003 Microchip Technology Inc. MCP6S21/2/6/8 = +5.0V GND V/ REF /2, and pF 18% 420 Samples 16 14 -40 to +125° ...

  • Page 10

    ... MCP6S21/2/6/8 Note: Unless otherwise indicated +25° Input = CH0 = (0.3V)/G, CH1 to CH7 = 0.3V, R 200 150 100 +2.5 DD -50 -100 V = +5.5 DD -150 -200 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 V Voltage (V) REF FIGURE 2-7: Input Offset Voltage vs. V Voltage. REF 0. 0. OUT V / ONL 0.001 V / ONL 0.0001 ...

  • Page 11

    ... FIGURE 2-16: 10,000 V 1,000 100 10 1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 115 125 FIGURE 2-17: Voltage + 1000 FIGURE 2-18: Load. MCP6S21/2/6 V/V, SS Input Referred = 5 2 100 1000 10000 100000 100 1k 10k 100k Frequency (Hz) PSRR vs. Frequency +125° +85°C A Input Voltage (V) Input Bias Current vs ...

  • Page 12

    ... MCP6S21/2/6/8 Note: Unless otherwise indicated +25° Input = CH0 = (0.3V)/G, CH1 to CH7 = 0. -20 1.E+05 1.E+06 1.E+07 100k 1M 10M Frequency (Hz) FIGURE 2-19: Gain vs. Frequency. 100% 420 Samples 90 5 80% 70% 60% 50% 40% 30% 20% 10% 0% Quiescent Current in Shutdown (µA) ...

  • Page 13

    ... FIGURE 2-29: Response. 1.6 20 1.4 15 1.2 (CH0 = 0. 0.8 0 0.6 OUT -5 0.4 -10 0.2 -15 0.0 -20 4.00E-06 4.50E-06 5.00E-06 0.00E+00 FIGURE 2-30: MCP6S21/2/6 V/ P 1.E+03 1.E+04 1.E+05 1k 10k 100k Frequency (Hz) THD plus Noise vs OUT P-P 7 +5.0V DD 6.5 5.5 4.5 3.5 2.5 1 OUT ...

  • Page 14

    ... Frequency 1.84 1.88 -1 0.0E+00 1.0E-03 FIGURE 2-34: shows no phase reversal under overdrive +16, +32 1.E+05 1.E+06 1.E+07 100k 1M 10M Frequency (Hz) Output Voltage Swing vs 5 V/V V OUT 2.0E-03 3.0E-03 4.0E-03 5.0E-03 6.0E-03 7.0E-03 8.0E-03 9.0E-03 1.0E-02 Time (1 ms/div) The MCP6S21/2/6/8 family 2003 Microchip Technology Inc. ...

  • Page 15

    ... External Reference Voltage (V The V pin should voltage between V REF V (the MCP6S22 has V tied internally REF The voltage at this pin shifts the output voltage. 2003 Microchip Technology Inc. MCP6S21/2/6/8 MCP6S28 Symbol 1 V Analog Output OUT 2 CH0 Analog Input 3 CH1 Analog Input ...

  • Page 16

    ... For simplicity, they can be tied but the input current may increase OUT The one channel MCP6S21 has the lowest input bias current, while the eight channel MCP6S28 has the highest. There is about a 2:1 ratio parts. 4.2 ...

  • Page 17

    ... The Power-on Reset (POR) circuitry will temporarily place the part in shutdown when activated. See Section 5.4, “Power-On Reset”, for details. V OUT – MCP6S21/2/6 LAD F is still attached to the OUT LAD LAD ; even in shutdown. This means that the DS21117A-page 17 + ...

  • Page 18

    ... SO goes low after CS goes high; it has a push-pull output that does not go into a high-Z state. The MCP6S21/2/6/8 devices operate in SPI Modes 0,0 and 1,1. In 0,0 mode, the clock idles in the low state (Figure 5-1) and, in 1,1 mode, the clock idles in the high state (Figure 5-2) ...

  • Page 19

    ... The device is brought out of Shutdown mode when a valid command, other than NOP or Shutdown, is sent and CS is raised. W-0 W-0 U-x U — — Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP6S21/2/6/8 U-x U-x W-0 — — A0 bit Bit is unknown DS21117A-page 19 ...

  • Page 20

    ... MCP6S21/2/6/8 5.2.2 SETTING THE GAIN The amplifier can be programmed to produce binary and decimal gain settings between +1 V/V and +32 V/V. Register 5-2 shows the details. At the same time, differ- ent compensation capacitors are selected to optimize the bandwidth vs. slew rate trade-off (see Table 4-1). REGISTER 5-2: GAIN REGISTER U-x — ...

  • Page 21

    ... CH1 CH0 CH2 CH1 CH3 CH0 CH4 CH1 CH5 CH0 CH0 CH1 CH0 W = Writable bit U = Unimplemented bit, read as ‘0’ ’1’ = Bit is set ’0’ = Bit is cleared MCP6S21/2/6/8 W-0 W-0 W bit 0 MCP6S28 CH0 (Default) CH1 CH2 CH3 CH4 CH5 CH6 CH7 ...

  • Page 22

    ... DS21117A-page 22 The example in Figure 5-3 shows a daisy chain config- uration with two devices, although any number of devices can be configured this way. The MCP6S21 and MCP6S22 can only be used at the far end of the daisy chain because they do not have a serial data out (SO) pin ...

  • Page 23

    ... Instruction Byte for Device 2 SO (first 16 bits out are always zeros) FIGURE 5-5: Serial bus sequence for daisy-chain configuration; SPI 1,1 mode. 2003 Microchip Technology Inc. MCP6S21/2/6 10111213141516 Data Byte Instruction Byte for Device 2 for Device 1 Instruction Byte for Device 2 ...

  • Page 24

    ... MCP6S21/2/6/8 5.4 Power-On Reset If the power supply voltage goes below the POR trip voltage (V < V 1.7V), the internal POR circuit DD POR will reset all of the internal registers to their power-up defaults (this is a protection against low power supply voltages). The POR circuit also holds the part in shut- down mode while it is activated ...

  • Page 25

    ... V ground plane. A multi-layer ceramic chip capacitor, or high-frequency equivalent, works best. 6.3.2 SIGNAL COUPLING The input pins of the MCP6S21/2/6/8 family of opera- tional amplifiers (op amps) are high-impedance. This makes them especially susceptible to capacitively-cou- pled noise. Using a ground plane helps reduce this problem. ...

  • Page 26

    ... FIGURE 6-3: Wide Dynamic Range Current Measurement Circuit. 6.4.2 SHIFTED GAIN RANGE PGA Figure 6-4 shows a circuit using an MCP6021 at a gain of +10 in front of an MCP6S21. This changes the over- all gain range to +10 V/V to +320 V/V (from +1 V/V to +32 V/V MCP6S21 MCP6021 10.0 k 1.11 k FIGURE 6-4: PGA with Modified Gain Range ...

  • Page 27

    ... Microcontroller SPI™ FIGURE 6-9: Expanded Input for a PICmicro Microcontroller. 2003 Microchip Technology Inc. MCP6S21/2/6/8 6.4.7 ADC DRIVER The family of PGA’s is well suited for driving Analog-to- Digital Converters (ADC). The binary gains ( and 32) effectively add five more bits to the input range (see Figure 6-10) ...

  • Page 28

    ... MCP6S21/2/6/8 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 8-Lead PDIP (300 mil) (MCP6S21, MCP6S22) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (150 mil) (MCP6S21, MCP6S22) XXXXXXXX XXXXYYWW NNN 8-Lead MSOP (MCP6S21, MCP6S22) XXXXX YWWNNN Legend: XX...X Customer specific information* YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘ ...

  • Page 29

    ... PDIP (300 mil) (MCP6S26) XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 14-Lead SOIC (150 mil) (MCP6S26) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 14-Lead TSSOP (4.4mm) (MCP6S26) XXXXXXXX YYWW NNN 2003 Microchip Technology Inc. MCP6S21/2/6/8 Example: MCP6S26-I/P XXXXXXXXXXXXXX 0345256 Example: MCP6S26ISL XXXXXXXXXXXXXXXXXXXXXXXXX 0345256 Example: MCP6S26IST 0345 256 DS21117A-page 29 ...

  • Page 30

    ... MCP6S21/2/6/8 Package Marking Information (Con’t) 16-Lead PDIP (300 mil) (MCP6S28) XXXXXXXXXXXXXX XXXXXXXXXXXXXX YYWWNNN 16-Lead SOIC (150 mil) (MCP6S28) XXXXXXXXXXXXX XXXXXXXXXXXXX YYWWNNN DS21117A-page 30 Example: MCP6S28-I/P XXXXXXXXXXXXXX 0345256 Example: MCP6S28-I/SL XXXXXXXXXXXXXXXXXXXXXXXX 0345256 2003 Microchip Technology Inc. ...

  • Page 31

    ... A2 .115 .130 .145 A1 .015 E .300 .313 .325 E1 .240 .250 .260 D .360 .373 .385 L .125 .130 .135 c .008 .012 .015 B1 .045 .058 .070 B .014 .018 .022 § eB .310 .370 .430 MCP6S21/2/6 MILLIMETERS MIN NOM MAX 8 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 9.14 9.46 9.78 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. ...

  • Page 32

    ... MCP6S21/2/6/8 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width ...

  • Page 33

    ... MAX .026 A .044 A2 .030 .034 .038 A1 .002 .006 E .193 .200 .184 .114 .118 .122 E1 D .114 .118 .122 L .016 .022 .028 F .035 .037 .039 .004 .006 .008 B .010 .012 .016 7 7 MCP6S21/2/6/8 A2 MILLIMETERS* MIN NOM MAX 8 0.65 1.18 0.76 0.86 0.97 0.05 0.15 4.90 .5.08 4.67 2.90 3.00 3.10 2.90 3.00 3.10 0.40 0.55 0.70 0.90 0.95 1. 0.10 0.15 0.20 0.25 0.30 0. DS21117A-page 33 ...

  • Page 34

    ... MCP6S21/2/6/8 14-Lead Plastic Dual In-line (P) – 300 mil (PDIP Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width ...

  • Page 35

    ... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 2003 Microchip Technology Inc. MCP6S21/2/6 Units ...

  • Page 36

    ... MCP6S21/2/6/8 14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top ...

  • Page 37

    ... A2 .115 .130 .145 A1 .015 E .300 .313 .325 E1 .240 .250 .260 D .740 .750 .760 L .125 .130 .135 c .008 .012 .015 B1 .045 .058 .070 B .014 .018 .022 eB .310 .370 .430 MCP6S21/2/6 MILLIMETERS MIN NOM MAX 16 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 18.80 19.05 19.30 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 .036 0.46 0.56 7.87 9.40 10. ...

  • Page 38

    ... MCP6S21/2/6/8 16-Lead Plastic Small Outline (SL) – Narrow 150 mil (SOIC Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width ...

  • Page 39

    ... NOTES: 2003 Microchip Technology Inc. MCP6S21/2/6/8 DS21117A-page 39 ...

  • Page 40

    ... Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 Microchip Technology Inc. MCP6S21/2/6/8 Examples: a) MCP6S21-I/P: One Channel PGA, PDIP package. b) MCP6S21-I/SN: One Channel PGA, SOIC package. c) MCP6S21-I/MS: One Channel PGA, MSOP package ...

  • Page 41

    ... MCP6S21/2/6/8 NOTES: DS21117A-page 40 2002 Microchip Technology Inc. ...

  • Page 42

    Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families ...

  • Page 43

    M W ORLDWIDE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com Rocky Mountain 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-4338 Atlanta 3780 Mansell Road, ...