74ALVC245 Fairchild Semiconductor, 74ALVC245 Datasheet
74ALVC245
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74ALVC245 Summary of contents
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... The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The 74ALVC245 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V. CC ...
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Connection Diagram Logic Diagram www.fairchildsemi.com Truth Table Inputs Outputs OE T Bus B –B Data to Bus Bus A –A Data to Bus HIGH Z State on A ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) (Note 4) 0. Input Diode Current ( Output Diode Current (I ) ...
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AC Electrical Characteristics Symbol Parameter V CC Min Propagation Delay 1.3 PHL PLH Output Enable Time 1.6 PZL PZH Output Disable Time 1.7 PLZ PHZ Capacitance Symbol Parameter C Input Capacitance ...
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AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics: f Symbol 3. FIGURE 2. Waveform for Inverting and Non-Inverting Functions ...
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Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...