74ALVC16244MTDX Fairchild Semiconductor, 74ALVC16244MTDX Datasheet
74ALVC16244MTDX
Specifications of 74ALVC16244MTDX
Related parts for 74ALVC16244MTDX
74ALVC16244MTDX Summary of contents
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... Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2005 Fairchild Semiconductor Corporation Features 1.65V–3.6V V supply operation CC 3 ...
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Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW –I Inputs –O Outputs Connect FBGA ...
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Functional Description The 74ALVC16244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) con- trolled with each nibble functioning identically, but indepen- dent of each other. The control pins may be shorted together to obtain full ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) (Note 5) 0. Input Diode Current ( Output Diode Current ...
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AC Electrical Characteristics Symbol Parameter V CC Min Propagation Delay 1.3 PHL PLH Output Enable Time 1.3 PZL PZH Output Disable Time 1.3 PLZ PHZ Capacitance Symbol Parameter C Input Capacitance ...
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AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics 1MHz; t Symbol r 3.3V 0. ...
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Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...