SA25F005 Saifun, SA25F005 Datasheet - Page 21

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SA25F005

Manufacturer Part Number
SA25F005
Description
512Kb Serial Flash
Manufacturer
Saifun
Datasheet

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Write Status Register (WRSR)
The WRSR instruction enables the user to
select one of four levels of protection. The
SA25F005 is divided into four array
segments. The top quarter, top half or all of
the memory segments can be protected
(for more details, refer to Table 9). The
data within a selected segment is therefore
read-only.
The WRSR instruction (as shown in
Table 11) also allows the user to enable or
disable the WPb pin via the WPBEN bit.
Hardware write protection is enabled when
the WPb pin is low and the WPBEN bit is
1, and disabled when either the WP pin is
high or the WPBEN bit is 0. When the
device is hardware write protected, writes
to the status register are disabled.
Level
1/4
1/2
All
0
NOTE:
When the WPBEN bit is hardware write
protected, it cannot be changed back
to 0 while the WPb pin is held low.
Table 9. Block Write Protect Bits
Status Register Bits
BP1
0
0
1
1
BP0
0
1
0
1
Array Addresses
00000 - 0FFFF
8000 - 0FFFF
8000 - 0FFFF
Protected
None
The WRSR instruction is enabled:
WPb WPBEN WEN
High
High
Low
Low
1. When the WPb pin is held high and
2. When the WPb pin is held low, the
X
X
the device has been previously write
enabled via the WREN instruction.
WPBEN bit is 0 and the device has
been previously write enabled via the
WREN instruction.
X
X
0
0
1
1
Table 11. WPBEN Operation
0
1
0
1
0
1
Protected
Protected
Protected
Protected
Protected
Protected
Protected
SA25F005 Advanced Information
Blocks
protected
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Protected
Protected
Protected
Writeable
Writeable
Writeable
Blocks
Un-
Register
Protected
Writeable
Protected
Protected
Protected
Writeable
SAIFUN
Status
21

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